Hi,
The patch below adds cmpxchg8b support for writable page tables
(emulation code path), which is needed to make atomic pae l1
page table updates work.
Originally by Scott Parish, pulled from list archive ;)
Gerd
Index: xen/arch/x86/mm.c
==================================================================---
xen.orig/arch/x86/mm.c 2005-06-22 14:55:43.000000000 +0200
+++ xen/arch/x86/mm.c 2005-06-22 14:59:26.000000000 +0200
@@ -2792,12 +2792,30 @@ static int ptwr_emulated_cmpxchg(
return ptwr_emulated_update(addr, old, new, bytes, 1);
}
+#if CONFIG_X86_PAE
+static int ptwr_emulated_cmpxchg8b(
+ unsigned long addr,
+ unsigned long old,
+ unsigned long old_hi,
+ unsigned long new,
+ unsigned long new_hi)
+{
+ return ptwr_emulated_update(addr,
+ (u64)old_hi << sizeof(old_hi)*8 | old,
+ (u64)new_hi << sizeof(new_hi)*8 | new,
+ sizeof(u64), 1);
+}
+#endif
+
static struct x86_mem_emulator ptwr_mem_emulator = {
.read_std = x86_emulate_read_std,
.write_std = x86_emulate_write_std,
.read_emulated = x86_emulate_read_std,
.write_emulated = ptwr_emulated_write,
- .cmpxchg_emulated = ptwr_emulated_cmpxchg
+ .cmpxchg_emulated = ptwr_emulated_cmpxchg,
+#if CONFIG_X86_PAE
+ .cmpxchg8b_emulated = ptwr_emulated_cmpxchg8b,
+#endif
};
/* Write page fault handler: check if guest is trying to modify a PTE. */
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