Greg Kroah-Hartman
2018-Nov-19 16:28 UTC
[PATCH 4.14 064/124] x86/hyper-v: Enable PIT shutdown quirk
4.14-stable review patch. If anyone has any objections, please let me know. ------------------ From: Michael Kelley <mikelley at microsoft.com> commit 1de72c706488b7be664a601cf3843bd01e327e58 upstream. Hyper-V emulation of the PIT has a quirk such that the normal PIT shutdown path doesn't work, because clearing the counter register restarts the timer. Disable the counter clearing on PIT shutdown. Signed-off-by: Michael Kelley <mikelley at microsoft.com> Signed-off-by: Thomas Gleixner <tglx at linutronix.de> Cc: "gregkh at linuxfoundation.org" <gregkh at linuxfoundation.org> Cc: "devel at linuxdriverproject.org" <devel at linuxdriverproject.org> Cc: "daniel.lezcano at linaro.org" <daniel.lezcano at linaro.org> Cc: "virtualization at lists.linux-foundation.org" <virtualization at lists.linux-foundation.org> Cc: "jgross at suse.com" <jgross at suse.com> Cc: "akataria at vmware.com" <akataria at vmware.com> Cc: "olaf at aepfle.de" <olaf at aepfle.de> Cc: "apw at canonical.com" <apw at canonical.com> Cc: vkuznets <vkuznets at redhat.com> Cc: "jasowang at redhat.com" <jasowang at redhat.com> Cc: "marcelo.cerri at canonical.com" <marcelo.cerri at canonical.com> Cc: KY Srinivasan <kys at microsoft.com> Cc: stable at vger.kernel.org Link: https://lkml.kernel.org/r/1541303219-11142-3-git-send-email-mikelley at microsoft.com Signed-off-by: Greg Kroah-Hartman <gregkh at linuxfoundation.org> --- arch/x86/kernel/cpu/mshyperv.c | 11 +++++++++++ 1 file changed, 11 insertions(+) --- a/arch/x86/kernel/cpu/mshyperv.c +++ b/arch/x86/kernel/cpu/mshyperv.c @@ -20,6 +20,7 @@ #include <linux/interrupt.h> #include <linux/irq.h> #include <linux/kexec.h> +#include <linux/i8253.h> #include <asm/processor.h> #include <asm/hypervisor.h> #include <asm/hyperv.h> @@ -243,6 +244,16 @@ static void __init ms_hyperv_init_platfo if (efi_enabled(EFI_BOOT)) x86_platform.get_nmi_reason = hv_get_nmi_reason; + /* + * Hyper-V VMs have a PIT emulation quirk such that zeroing the + * counter register during PIT shutdown restarts the PIT. So it + * continues to interrupt @18.2 HZ. Setting i8253_clear_counter + * to false tells pit_shutdown() not to zero the counter so that + * the PIT really is shutdown. Generation 2 VMs don't have a PIT, + * and setting this value has no effect. + */ + i8253_clear_counter_on_shutdown = false; + #if IS_ENABLED(CONFIG_HYPERV) /* * Setup the hook to get control post apic initialization.