Hi, Is somewhere alghorithm description of encoder process implemented in libtheora? May be some drafts? May be frame dataflow throw encoder stages? PLEASE -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.xiph.org/pipermail/theora/attachments/20110318/c3e8e109/attachment.htm
Benjamin M. Schwartz
2011-Mar-18 17:24 UTC
[theora] alghorithm of working encoder in libtheora
On 03/18/2011 12:53 PM, digital design wrote:> I see this diagrams last week. But... Now i create hardware implementation > of theora encoder. I take encoder from lib as reference. But for me it is > dificult to understand funtional algorithm by this source. I sequentely > implement step by step all logic of this coder.This sounds like a great project. Maybe it would be helpful for you to look at the existing Verilog/FPGA implementation of a Theora encoder: http://sourceforge.net/projects/elphel/files/elphel333/6.3.9/elphel_6.3.9.tar.gz/download http://www3.elphel.com/linuxtag/talks_2005/paper-11081 This encoder from Elphel only implements a very small subset of Theora (for example, it does not use motion vectors), so it is not very useful. You may be able to save some time by reusing some of its code while producing a more advanced encoder. --Ben -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 198 bytes Desc: OpenPGP digital signature Url : http://lists.xiph.org/pipermail/theora/attachments/20110318/65c114de/attachment.pgp
Felipe Portavales Goldstein
2011-Mar-18 17:29 UTC
[theora] alghorithm of working encoder in libtheora
You may also want to look at a decoder implementation in VHDL for FPGA: http://svn.xiph.org/trunk/theora-fpga/ http://svn.xiph.org/trunk/theora-fpga/theora_hardware/ The encoder?shares some modules with the decoder, so you may like to look at it. On Fri, Mar 18, 2011 at 10:24 AM, Benjamin M. Schwartz <bmschwar at fas.harvard.edu> wrote:> > On 03/18/2011 12:53 PM, digital design wrote: > > I see this diagrams last week. But... Now i create hardware implementation > > of theora encoder. I take encoder from lib as reference. But for me it is > > dificult to understand funtional algorithm by this source. I sequentely > > implement step by step all logic of this coder. > > This sounds like a great project. ?Maybe it would be helpful for you to > look at the existing Verilog/FPGA implementation of a Theora encoder: > > http://sourceforge.net/projects/elphel/files/elphel333/6.3.9/elphel_6.3.9.tar.gz/download > > http://www3.elphel.com/linuxtag/talks_2005/paper-11081 > > This encoder from Elphel only implements a very small subset of Theora > (for example, it does not use motion vectors), so it is not very useful. > You may be able to save some time by reusing some of its code while > producing a more advanced encoder. > > --Ben > > > > _______________________________________________ > theora mailing list > theora at xiph.org > http://lists.xiph.org/mailman/listinfo/theora >-- ________________________________________ Felipe Portavales Goldstein <portavales at gmail> MS Student - IC-UNICAMP Computer Systems Laboratory http://lampiao.lsc.ic.unicamp.br/~portavales/
Benjamin M. Schwartz
2011-Mar-18 20:15 UTC
[theora] alghorithm of working encoder in libtheora
On 03/18/2011 01:44 PM, digital design wrote:> Now i implement next stages of encoder^ > Block1: > 1) RGB->YUV > 2) DCT of 16X16 blocks (pixel format 4:2:0) > 3) zig-zag in eatch 8*8 block from previous step and push it to bufer memory. > > i push 16X16 blocks to BLOCK1 using raster order (i'm right?) > Now i'm confused - so much types of ordering. What i must do after DCT? > What is order for pass blocks to Huffman block?In Theora terminology, a 16x16 unit spanning all 3 color planes (8x8 in U and V) is called a "macroblock". To encode the contents of a macroblock, you must separate out the different color planes, and form "superblocks" in each color plane. The DC coefficients of each block are then coded in "raster order", while the AC coefficients are coded in "coded order". These orders are described in sections 2.3 and 2.4 of the Theora bitstream specification. The ordering of coefficients is Y plane DC coefficients in raster order (whole plane) Y plane AC coefficient 1 in coded order (whole plane) Y plane AC coefficient 2 in coded order ... ... Same for U plane Same for V plane For future questions please use Reply-All so that more people can help you. --Ben -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 198 bytes Desc: OpenPGP digital signature Url : http://lists.xiph.org/pipermail/theora/attachments/20110318/a2136d79/attachment.pgp