Michael Jacobson
2007-Sep-12 14:29 UTC
[Speex-dev] alignment and static variable size question
Hi, I am using 1.2beta2 on a TI 54x, narrow band I changed all the speex dynamic allocation variables to static ones. It seems to work ok but when minor things change in the project it all goes to hell. I was hoping somebody could: a) verify that my sizes are correct or if they are too small b) Tell me if anything in the speex library is supposed to be aligned in any way in memory. I see there is an ALIGN define in one of the files for the stack but I am not entirely sure what that means (i'm inexperienced in C). here are all the sizes I use: #define ENC_WINBUF_SIZE 40 #define ENC_EXCBUF_SIZE 306 #define ENC_SWBUF_SIZE 306 #define ENC_LAGWINDOW_SIZE 11 #define ENC_OLD_LSP_SIZE 10 #define ENC_OLD_QLSP_SIZE 10 #define ENC_MEM_SP_SIZE 20 #define ENC_MEM_SW_SIZE 20 #define ENC_SW_WHOLE_SIZE 20 #define ENC_MEM_EXC_SIZE 20 #define ENC_MEM_EXC2_SIZE 20 #define ENC_PI_GAIN_SIZE 8 #define ENC_PITCH_SIZE 4 #define DEC_EXCBUF_SIZE 500 #define DEC_INTERP_QLPC_SIZE 10 #define DEC_OLD_QLSP_SIZE 10 #define DEC_MEM_SP_SIZE 20 #define DEC_PI_GAIN_SIZE 8 #define SPEEXENC_PERSIST_STACK_SIZE 5000 #define SPEEXENC_SCRATCH_STACK_SIZE 1170 #define SPEEXDEC_PERSIST_STACK_SIZE 2500 #define SPEEXDEC_SCRATCH_STACK_SIZE 550 Thank you -Mike -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.xiph.org/pipermail/speex-dev/attachments/20070912/a665b975/attachment.htm
Jean-Marc Valin
2007-Sep-12 15:56 UTC
[Speex-dev] alignment and static variable size question
> a) verify that my sizes are correct or if they are too smallJust pad with 0xdeadbeef values and you'll see.> b) Tell me if anything in the speex library is supposed to be aligned > in any way in memory. I see there is an ALIGN define in one of the > files for the stack but I am not entirely sure what that means (i'm > inexperienced in C).Well, ALIGN means align the memory. At the very least, 16-bit values must be 16-bit aligned and 32-bit values must be 32-bit aligned. For some architecture-specific optimisations (don't think there are any yet on TI DSPs), you may need extra alignment (e.g. SSE instructions require 16-byte alignment). Jean-Marc