similar to: Limit of matrix + naming

Hi all, I tried to do a variance components using nlme, but I got the following warning mesage ##################################################### not meaningful for factors in: Ops.factor(y[revOrder], Fitted) ###################################################### Can someone point out what is the meaning of this warning message? I tried to look at Ops.factor, but I don't

Hi all, Suppose I have a 4 x 2 matrix A and I want to select the values in second column such that the value in first column equals to k. I gave the colnames as alpha beta, so I was trying to access the info using A$beta[A[,1]==k], however, I was told it's not a data frame, I can get the object by using dollar sign. I tried data.frame(A), but it didn't work. Any input

Hi all, If I want to write a for loop to loop through a set of factors, which are not coded in 1,2,3, for e.g in character, possible to write the for loop without changing it to categorical variables? I saw the manual mentions for loop will take a list, but I'm not sure how to create a list here. Any input will be appreciated. Thanks. Yen Lin [[alternative HTML version deleted]]

Hi all, I wonder how could I convert a matrix A to a dataframe such that whenever I'm running a linear model such lme, I can use A$x1? I tried data.frame(A), it didn't work. Should I initialize A not as a matrix? Thanks. Yen Lin [[alternative HTML version deleted]]

Hi all, I just wonder what singular convergence means. Thanks. Yen Lin Error in lme.formula(Data ~ 1, random = ~1 | Wafer/fie/loc, subset = Wafer == : singular convergence (7) [[alternative HTML version deleted]]

Hi all, Does lme has function to compute the cook's distance or influence measure like lm? I can't find them. Thanks. Yen Lin [[alternative HTML version deleted]]

Dear all, Do you have come acrross with this issue. My ss7 link get fluctuating. It use chan_ss7 version 1.0.95-beta. I have 8 E1s running on a DL380 server. This enable to have calls from sip to ss7 and vice versa. However ss7 links are not stable. linkset siuc, link l1, schannel 1, sls 0, NOT_ALIGNED, rx: 1, tx: 2/4, sentseq/lastack: 127/127, total 4034145216, 4031118560 linkset siuc, link

The instcombine pass cleans up a lot. Any idea why there are still shufflevector, insertelement, *and* bitcast (!!) etc. instructions left? The original loop is so clean, a textbook example I'd say. There is no need to shuffle anything.At least I don't see it. Frank vector.ph: ; preds = %L5 %broadcast.splatinsert1 = insertelement <4 x

The loop vectorizer relies on cleanup passes to be run after it: from Transforms/IPO/PassManagerBuilder.cpp: // Add the various vectorization passes and relevant cleanup passes for // them since we are no longer in the middle of the main scalar pipeline. MPM.add(createLoopVectorizePass(DisableUnrollLoops)); MPM.add(createInstructionCombiningPass());

The following IR implements the following nested loop: for (int i = start ; i < end ; ++i ) for (int p = 0 ; p < 4 ; ++p ) a[i*4+p] = b[i*4+p] + c[i*4+p]; define void @main(i64 %arg0, i64 %arg1, i1 %arg2, i64 %arg3, float* noalias %arg4, float* noalias %arg5, float* noalias %arg6) { entrypoint: br i1 %arg2, label %L0, label %L1 L0:

On 11/12/2009, at 10:43 AM, Anton Korobeynikov wrote: > Hi, Chris > >> That is target independent code, so you should not put sparc specific changes there. It sounds like one of the sparc-specific target hooks is wrong. > Since sparc does not provide any hooks for operation of branches (e.g. > AnalyzeBranch and friends) it might be possible that generic codegen > code is

Hi, How does the requirement that phi instructions have one value per predecessor basic block interact with indirectbr instructions? For instance, take the following code: L1: br i1 %somevalue, label %L2, label %L3 L2: %ret1 = i8* blockaddress(@myfunction, %L5) br label %L4 L3: %ret2 = i8* blockaddress(@myfunction, %L6) br label %L4 L4: %ret = phi i8* [%ret1, L2], [%ret2, L3]

With LLVM 3.8 the JIT compiler engine generates an AVX512 instruction although I target an 'avx2' CPU (intel Core I7). I just downloaded the most recent 3.8 and still it happens. It happens with this input module: target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" define void @module_cFFEMJ(i64 %lo, i64 %hi, i64 %myId, i1 %ordered, i64 %start, i32* noalias align 32

On Feb 8, 2010, at 12:37 AM, Nathan Keynes wrote: > Firstly, the BNE/BA pair should be reduced to a BE (I assume this is > the responsibility of AnalyzeBranch and friends that you mention). Right. Implementing AnalyzeBranch will allow a bunch of block layout and branch optimizations to happen. > However I still wouldn't have expected that to result in the label > being

I am trying a setup where the one loop is rewritten as two loops. This avoids the 'rem' and 'div' instructions in the index calculation (which give the loop vectorizer a hard time). However, with this setup the loop vectorizer complains about a too small loop. LV: Checking a loop in "main" LV: Found a loop: L3 LV: Found a loop with a very small trip count. This loop

On 06/23/2016 12:56 PM, Craig Topper wrote: > Can you check what value "getHostCPUName" returned? getHostCPUName() = skylake > > On Thu, Jun 23, 2016 at 9:53 AM, Frank Winter via llvm-dev > <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote: > > With LLVM 3.8 the JIT compiler engine generates an AVX512 > instruction although I

In the case when coming from C it was probably the loop unroller and SLP vectorizer which vectorized the code. Potentially I could do the same in the IR. However, the loop body that is generated in the IR can get very large. Thus, the loop unroller will refuse to unroll the loop in a large number of (important) cases. Isn't there a way to convince the loop vectorizer that it should

Hi David! Many thanks for your very encouraging and kind feedback!!! (Hope you don't mind that I made your post public on the Theora channel). I try to be the more sincere as I can in my posts.Some people suggested me to make demo pages to explain how the codec works step by step, and I realize that it would be good, because certainly it will show that the NHW codec is not that complex and

Hello, I m working on a hardware with very large vector width till v2048. Now when I vectorize using llvm default vectorizer maximum 2047 iterations are scalar remainder loop. These are not vectorized by llvm which increases the cost. However these should be vectorized using next available vector width I.e v1024, v512, v256, v128, v64, v32, v16, v8, v4..... The issue of scalar remainder loop has

Hi, The C backend in llc generates code like: static inline int llvm_fcmp_ord(double X, double Y) { return X == X && Y == Y; } static inline int llvm_fcmp_uno(double X, double Y) { return X != X || Y != Y; } First of all it generates a warning by clang and gcc (with certain flags): x.cbe.c:130: warning: comparing floating point with == or != is unsafe Now, C99 provides a macro for this