similar to: Intel-VTd problem

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hello folks I played a lot with Xen last days, isnt it possible to access PCI devices which are hidden from dom0? I didnt get it - at least my windows domain didnt get it. Another question: Im using hvmloader but many pages also talk about the vmxloader, was it prior the hvmloader coz it doesnt exist anymore? cheers - -- Georg

Hello Hopefully some developer will see this too. I''ve problems using set_data method for example with wxruby 1.9.7/ruby 1.8.6 on mswin32. It always crashes: ..../classes/bitmap.rb:17: [BUG] segmentation fault On my Linux it works fine (thats no suprise of course). Probably somebody has a clue - I exported this raw data also with get_data, I guess this should be platform independent

Full_Name: Franc Brglez Version: R 2.9.1 GUI 1.28 Tiger build 32-bit (5444) OS: MacOSX -- 10.6.2 Submission from: (NULL) (24.148.163.114) I am demonstrating what may be a bug or my lack of experience. Please review as it would help to hear from someone. MANY THANKS -- Franc Brglez The function "binS2binV" returns what I consider a wrong value -- see the terminal output binS2binV =

Version 2.3 of VTD-XML (http://vtd-xml.sf.net), the next generation document-centric XML processing model, is now released. To download the latest version please visit http://sourceforge.net/project/showfiles.php?group_id=110612&package_.... Below is a list of new features and enhancements in this version. * VTDException is now introduced as the root class for all other VTD- XML''s

Hi, The staging tree 19185:1eb6afcad849 cannot be compiled on ia64: vtd.c: In function `alloc_pgtable_maddr'': vtd.c:60: error: too few arguments to function `iommu_flush_cache_page'' The attached patch fixes it. Signed-off-by: KUWAMURA Shin''ya <kuwa@jp.fujitsu.com> Best regards, -- KUWAMURA Shin''ya

Attached is a patch for shared interrupt between dom0 and HVM domain for vtd. Most of problem is caused by that we should inject interrupt to both domains and the physical interrupt deassertion then may be delayed by the device assigned to the HVM. The patch adds a timer, and the time out value is sufficient large to tolerant the delaying used to wait for the physical interrupt deassertion.

Pass gfx_passthru parameter to QEMU. Keep it boolean for now as QEMU does not expect any other integer value. Signed-off-by: Allen Kay <allen.m.kay@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

The patch makes some pci access functions architecture independent. It only moves the 2 functions from xen/arch/x86/pci.c to xen/drivers/pci/pci.c. Thanks, -- Dexuan _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

For IOAPIC interrupt remapping, it only needs to remap ioapci RTE, should not remap other IOAPIC registers, which are IOAPIC ID, VERSION and Arbitration ID. This patch adds the check for this and only remap ioapci RTE. Signed-off-by: Anthony Xu <anthony.xu@intel.com> Signed-off-by: Weidong Han <weidong.han@intel.com> _______________________________________________ Xen-devel mailing

This patch removes a wrong if condition judgement to setup rmrr identify mapping for guests, and passes page count rather than address size to iommu_flush_iotlb_psi(). Signed-off-by: Weidong Han <weidong.han@intel.com> Signed-off-by: Anthony Xu <Anthony.xu@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com

During parsing DMAR table, if find RMRR is incorrect, return error. Signed-off-by: Weidong Han <weidong.han@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

Fix addr_to_dma_page() issue to return l1e correctly, and also clean up rmrr mapping code, make sure setup rmrr identify mapping just once per domain. This patch fixes the VT-d bug (Fail to boot smp Linux guest with VT-d NIC assigned on IA32e platform). Signed-off-by: Weidong Han <weidong.han@intel.com> _______________________________________________ Xen-devel mailing list

Now if VT-d is enabled, when Dom0 does S3, Xen doesn''t suspend/resume the IOMMU states. The patch adds the missing invocations of iommu_suspend()/iommu_resume() and makes some nesessary fixes: 1) In iommu_set_root_entry(), we should not re-allocate the root-entry when Xen returns from S3; 2) Define the array iommu_state correctly (u8 -> u32); 3) Only save/restore the necessary IOMMU

Setting isa irq mapping in hvm_do_IRQ_dpci() costs time when each interrupt occurs, and it doesn''t update isa irq mapping when pci_link is updated. This patch fixes this issue. Signed-off-by: Weidong Han <weidong.han@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

MSI-x may have multiple vectors, however in current interrupt remapping code, one device only has one entry in interrupt remapping table. This patch adds ''remap_index'' in msi_desc structure to track its index in interrupt remapping table. Signed-off-by: Haitao Shan <haitao.shan@intel.com> Signed-off-by: Weidong Han <weidong.han@intel.com>

If pass-through field in extended capability register is set, set pass-through translation type for Dom0, that means DMA requests with Untranslated addresses are processed as pass-through in Dom0, needn''t translate DMA requests through a multi-level page-table. Signed-off-by: Anthony Xu <anthony.xu@intel.com> Signed-off-by: Weidong Han <weidong.han@intel.com>

When ir_ctrl->iremap_index == -1, it means there is no remap entry. So it needn''t to convert from remap format to normal ioapic format. Signed-off-by: Weidong Han <weidong.han@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

This patch cleans up iommu code. Signed-off-by: Weidong Han <weidong.han@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

One more fix about PMR disable. Move PMR disable into per-iommu enable function, instead of in current iommu_setup which only takes effect on first VT-d engine. This change also enlightens S3 resume path. Signed-off-by Gang Wei (Jimmy) <gang.wei@intel.com> Signed-off-by Kevin Tian <kevin.tian@intel.com> Thanks, Kevin _______________________________________________ Xen-devel

This patch turns on ATS in VT-d context entries and devices with ATS capability. It also contain minor code clean up. Signed-off-by: Allen Kay <allen.m.kay@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel