Displaying 15 results from an estimated 15 matches similar to: "[PATCH] minios: fix p2m on x86"
2012 Nov 26
13
[PATCH 0 of 4] Minios improvements for app development
This patch series contains a set of patches making minios rather easier
to use, from an application development point of view.
Overview of patches:
1 Command line argument parsing support, from Xen.
2 Weak console handler function.
3 Build system tweaks for application directories.
4 Trailing whitespace cleanup. (because it is very messy)
Patch 4 is likely to be more controversial than
2007 Jan 25
0
[PATCH][PAGING][P2M][1/1] Common Interface for P2M table
This patch worked on top of paging interface patches posted today. It
create common interface for P2M table, which handles guest physical
address to machine physical address translation.
Tested on the following platforms:
1. AMD SVM boxes
* 64-bit Xen: 32-bit WinXP SP2, 32-bit SUSE10, 32-bit SUSE 10 PAE
BigSMP, and 64-bit RHEL4
* 32-bit PAE Xen: 32-bit WinXP SP2, 32-bit SUSE10, 32-bit SUSE 10
2012 Sep 04
1
[PATCH] xen/p2m: Fix one by off error in checking the P2M tree directory.
We would the full P2M top directory from 0->MAX_DOMAIN_PAGES (inclusive).
Which meant that if the kernel was compiled with MAX_DOMAIN_PAGES=512
we would try to use the 512th entry. Fortunately for us the p2m_top_index
has a check for this:
BUG_ON(pfn >= MAX_P2M_PFN);
which we hit and saw this:
(XEN) domain_crash_sync called from entry.S
(XEN) Domain 0 (vcpu#0) crashed on cpu#0:
(XEN)
2010 Sep 19
1
odd gfn number checking in p2m.c
Hello,
how can a gfn become 0x555555 as checked in
p2m.c:guest_physmap_add_entry() and p2m_alloc_table()?
Looking further in p2m.c, audit_p2m() checks only for a 32bit value.
So where is that magic number set, and why is it not a define to
simplify grepping for users of that value?
Olaf
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2013 Feb 28
1
[PATCH] x86/mm: fix invalid unlinking of nested p2m tables
Commit 90805dc (c/s 26387:4056e5a3d815) ("EPT: Make ept data stucture or
operations neutral") makes nested p2m tables be unlinked from the host
p2m table before their destruction (in p2m_teardown_nestedp2m).
However, by this time the host p2m table has already been torn down,
leading to a possible race condition where another allocation between
the two kinds of table being torn down can
2006 Jul 29
0
[PATCH] build p2m mapping according to m2p mapping
build p2m mapping according to m2p mapping.
Signed-off-by: Xin Li <xin.b.li@intel.com>
Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
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2007 Apr 03
2
Question regarding the number of P2M l3e entries
In p2m.c (line 197 and line 550), the code assumes the number of L3 P2M
table entries is 8 (under PAE mode). According to Intel and AMD specs,
it is 4. Could someone explain this discrepancy? Is it a bug?
-Wei
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2013 Aug 27
1
[PATCH] xen/balloon: don't set P2M entry for auto translated guest
In commit cd9151e2: xen/balloon: set a mapping for ballooned out pages
we have the ballooned out page''s mapping set to a scratch page.
That commit also sets the P2M entry of ballooned out page to the scratch
page''s MFN. This is necessary for PV guest but not for HVM guest. On the
other hand, setting the P2M entry would trigger BUG_ON in
__set_phys_to_machine.
The correct thing
2010 Mar 02
2
[PATCH][XEN] p2m cleanup: remove unused function
Hi!
Attached patch removes gfn_to_mfn_current(). It is redundant and effectively
unused.
All remaining users now use proper replacement function.
=> No functional change.
While here, silence stdvga and use page_mode_hap()
consequently.
Signed-off-by: Christoph Egger <Christoph.Egger@amd.com>
--
---to satisfy European Law for business letters:
Advanced Micro Devices GmbH
2007 Aug 07
3
Why p2m allocation is from hap or shadow preallocated memory?
And can we make p2m memory allocation from domain heap directly?
-Xin
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2012 Mar 15
3
[PATCH] arm: allocate top level p2m page for all non-idle VCPUs
Not just dom0.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
---
xen/arch/arm/domain.c | 3 +++
xen/arch/arm/domain_build.c | 3 ---
xen/arch/arm/p2m.c | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
index 5702399..4b38790 100644
--- a/xen/arch/arm/domain.c
+++ b/xen/arch/arm/domain.c
@@
2012 Aug 15
4
E5606 with no HVM; Assertion 'i == 1' failed at p2m-ept.c:524
Hi Xen developers and enthousiasts,
Recently I have been having a lot of problems with HVM hosts on a dual
Xeon E5606 box. Problem is that HVM hosts don''t work on it at all and
crash the server.
Today I got the logging to work over an IPMI console so then I compiled
a fresh xen-unstable. Apart from the message I posted in the subject
the call trace reads as follows:
(XEN) Xen call
2011 Mar 25
2
[RFC PATCH 2/3] AMD IOMMU: Implement p2m sharing
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Alberto Bozzo, Andrew Bowd
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2011 Jun 27
20
[PATCH 0 of 5] v2: Nested-p2m cleanups and locking changes
This patch series tidies up a few bits ofthe nested p2m code.
The main thing it does is reorganize the locking so that most of the
changes to nested p2m tables happen only under the p2m lock, and the
nestedp2m lock is only needed to reassign p2m tables to new cr3 values.
Changes since v1:
- a few minor fixes
- more sensible flushing policy in p2m_get_nestedp2m()
- smoke-tested this time!
2016 Mar 10
0
[PATCH] gr/fuc: Store $r0 in interrupt handler
It's supposed to always be 0, but at least nv_iowr() temporarily violates
this. Since the ih touches $r0, it should be stored.
Signed-off-by: Roy Spliet <rs855 at cam.ac.uk>
---
drm/nouveau/nvkm/engine/gr/fuc/gpc.fuc | 2 +
drm/nouveau/nvkm/engine/gr/fuc/gpcgf100.fuc3.h | 80 ++++----
drm/nouveau/nvkm/engine/gr/fuc/gpcgf117.fuc3.h | 82 ++++----