similar to: [PATCH 2/2]Add AMD IOMMU support into hypervisor

Signed-off-by: Wei Wang <wei.wang2@amd.com> -- AMD Saxony, Dresden, Germany Operating System Research Center Legal Information: AMD Saxony Limited Liability Company & Co. KG Sitz (Geschäftsanschrift): Wilschdorfer Landstr. 101, 01109 Dresden, Deutschland Registergericht Dresden: HRA 4896 vertretungsberechtigter Komplementär: AMD Saxony LLC (Sitz Wilmington, Delaware, USA)

Changeset 20514 implemented deallocation for msi interrupt remapping entries. Attached patch adds the same support for amd iommu to fix a xen crash on amd iommu systems. Thanks, Wei Signed-off-by: Wei Wang <wei.wang2@amd.com> -- Legal Information: Advanced Micro Devices GmbH Karl-Hammerschmidt-Str. 34 85609 Dornach b. München Geschäftsführer: Andrew Bowd, Thomas M. McCoy, Giuliano Meroni

Keir, pci-detach triggers IO page table deallocation if the last passthru device has been removed from pdev list, and this will result a BUG on amd systems for next pci-attach. This patch fixes this issue. Thanks, Wei Signed-off-by: Wei Wang <wei.wang2@amd.com> -- Advanced Micro Devices GmbH Sitz: Dornach, Gemeinde Aschheim, Landkreis München Registergericht München, HRB Nr. 43632

Clean up hardware initialization functions to make them more friendly to iommu suspend and resume operations. Signed-off-by: Wei Wang <wei.wang2@amd.com> --  AMD GmbH, Germany  Operating System Research Center    Legal Information:  Advanced Micro Devices GmbH  Karl-Hammerschmidt-Str. 34  85609 Dornach b. München    Geschäftsführer: Jochen Polster, Thomas M. McCoy, Giuliano Meroni  Sitz:

Make iommu suspend & resume functions more generic. Signed-off-by: Wei Wang <wei.wang2@amd.com> -- AMD GmbH, Germany Operating System Research Center Legal Information: Advanced Micro Devices GmbH Karl-Hammerschmidt-Str. 34 85609 Dornach b. München Geschäftsführer: Jochen Polster, Thomas M. McCoy, Giuliano Meroni Sitz: Dornach, Gemeinde Aschheim, Landkreis München

Introduce a new flag to disable iommu emulation on old iommu systems. This patch is taken from my v4 patch queue, which is till pending, to make old or non-iommu system to run cleanly without interfered by iommuv2 codes. This might be helpful to isolate iommuv2 code in debugging unstable regressions. The reset part of v4 will be re-based. Thanks, Wei Signed-off-by: Wei Wang

Signed-off-by: Wei Wang <wei.wang2@amd.com> -- Advanced Micro Devices GmbH Sitz: Dornach, Gemeinde Aschheim, Landkreis München Registergericht München, HRB Nr. 43632 WEEE-Reg-Nr: DE 12919551 Geschäftsführer: Alberto Bozzo, Andrew Bowd _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

Hi, A better boot output for non-iommu system. Thanks, Wei Signed-off-by: Wei Wang <wei.wang2@amd.com> -- AMD GmbH, Germany Operating System Research Center Legal Information: Advanced Micro Devices GmbH Karl-Hammerschmidt-Str. 34 85609 Dornach b. München Geschäftsführer: Andrew Bowd, Thomas M. McCoy, Giuliano Meroni Sitz: Dornach, Gemeinde Aschheim, Landkreis München Registergericht

Signed-off-by: Wei Wang <wei.wang2@amd.com> -- AMD Saxony, Dresden, Germany Operating System Research Center Legal Information: AMD Saxony Limited Liability Company & Co. KG Sitz (Geschäftsanschrift): Wilschdorfer Landstr. 101, 01109 Dresden, Deutschland Registergericht Dresden: HRA 4896 vertretungsberechtigter Komplementär: AMD Saxony LLC (Sitz Wilmington, Delaware, USA)

Keir, This patch fixes a Xen start up bug on non-iommu machine. Signed-off-by: Wei Wang <wei.wang2@amd.com> -- AMD Saxony, Dresden, Germany Operating System Research Center Legal Information: AMD Saxony Limited Liability Company & Co. KG Sitz (Geschäftsanschrift): Wilschdorfer Landstr. 101, 01109 Dresden, Deutschland Registergericht Dresden: HRA 4896 vertretungsberechtigter

Signed-off-by: Wei Wang <wei.wang2@amd.com> -- AMD Saxony, Dresden, Germany Operating System Research Center Legal Information: AMD Saxony Limited Liability Company & Co. KG Sitz (Geschäftsanschrift): Wilschdorfer Landstr. 101, 01109 Dresden, Deutschland Registergericht Dresden: HRA 4896 vertretungsberechtigter Komplementär: AMD Saxony LLC (Sitz Wilmington, Delaware, USA)

Hi, I''m running a machine with: - Hypervisor: xen-unstable - Dom0: xen/next-2.6.32.17 commit c3f5aba942c7516a5c76c47345ff0a473daf2542 Hardware: -MSI 890FXA-GD70 with AMD IOMMU -Phenom X6 I''m trying to do PCI passthrough to a HVM, this fails with: Error: Failed to assign device to IOMMU (0000:04:00.0@100,msitranslate=1,power_mgmt=0) Error: pci: to avoid potential security

This patch set adds basic supports for amd next generation iommu (IOMMUv2) hardware. IOMMUv2 supports various new features advertised by iommu extended feature register. It introduces guest level IO translation and supports state-of-the-art ATS/ATC devices with demand paging capability. Please refer to AMD IOMMU Architectural Specification [1] for more details. Thanks, Wei [1]

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This patch implements flush by asid feature for AMD CPUs. Thanks, Wei Signed-off-by: Wei Huang <wei.huang2@amd.com> Signed-off-by: Wei Wang <wei.wang2@amd.com> -- Advanced Micro Devices GmbH Sitz: Dornach, Gemeinde Aschheim, Landkreis München Registergericht München, HRB Nr. 43632 WEEE-Reg-Nr: DE 12919551 Geschäftsführer: Alberto Bozzo, Andrew Bowd

Future AMD SVM supports a new feature called flush by ASID. The idea is to allow CPU to flush TLBs associated with the ASID assigned to guest VM. So hypervisor doesn''t have to reassign a new ASID in order to flush guest''s VCPU. Please review it. Thanks, Wei Signed-off-by: Wei Huang <wei.huang2@amd.com> Signed-off-by: Wei Wang <wei.wang2@amd.com> -- Advanced Micro

flight 5665 xen-unstable real [real] http://www.chiark.greenend.org.uk/~xensrcts/logs/5665/ Regressions :-( Tests which did not succeed and are blocking: build-amd64-oldkern 4 xen-build fail REGR. vs. 5640 build-amd64 4 xen-build fail REGR. vs. 5640 build-i386-oldkern 4 xen-build fail REGR. vs. 5640

flight 5673 xen-unstable real [real] http://www.chiark.greenend.org.uk/~xensrcts/logs/5673/ Regressions :-( Tests which did not succeed and are blocking: test-i386-i386-xl 14 guest-localmigrate/x10 fail REGR. vs. 5640 Tests which did not succeed, but are not blocking, including regressions (tests previously passed) regarded as allowable: test-amd64-amd64-win 16

Hi, The following 4 patches enable direct device assignment (PCI passthru) for HVM guest on AMD IOMMU platforms. Please apply them against C/S 16491 as the named order. To enable AMD IOMMU, please add "enable_amd_iommu" as xen boot parameter. 1-cleanup.patch: code cleanup, bug fix, minor enhancements to existing amd-iommu codes. 2-passthru-amd.patch: passthru support, modifications to

flight 5685 xen-unstable real [real] http://www.chiark.greenend.org.uk/~xensrcts/logs/5685/ Failures :-/ but no regressions. Tests which are failing intermittently (not blocking): test-i386-xcpkern-i386-pv 5 xen-boot fail pass in 5680 Tests which did not succeed, but are not blocking, including regressions (tests previously passed) regarded as allowable: