similar to: [PATCH] Fix regs set/get decoding in VMXAssist

Hi, Keir: the gdtr information in oldctx is an address for guest, not for vmxassist. When access descriptor on guest gdt, we need to go through guest page table if guest enable paging. This error may happen if guest enable PE/PG in one instruction. This patch fix this issue. Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com> Signed-off-by: Xin Li <xin.b.li@intel.com> Thanks

Can you please check the vcpu status? I suspect one of the vcpu is blocked by halt instruction. Thanks Yunhong Jiang >-----Original Message----- >From: xen-devel-bounces@lists.xensource.com >[mailto:xen-devel-bounces@lists.xensource.com] On Behalf Of Tim Deegan >Sent: 2006年10月5日 23:55 >To: Li, Xin B >Cc: xen-devel@lists.xensource.com >Subject: Re: [Xen-devel] [PATCH] add

So, Keir, can you please check in this patch? Thanks Yunhong Jiang >-----Original Message----- >From: xen-devel-bounces@lists.xensource.com >[mailto:xen-devel-bounces@lists.xensource.com] On Behalf Of >John Clemens >Sent: Tuesday, February 28, 2006 1:35 AM >To: Jiang, Yunhong >Cc: Li, Xin B; xen-devel@lists.xensource.com >Subject: [Xen-devel] Re: [PATCH] Fix qemu-dm

build p2m mapping according to m2p mapping. Signed-off-by: Xin Li <xin.b.li@intel.com> Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

Hi, John Can you try the attached patch ? This issue can be reproduced on SMP platform, while the domain 0 is UP. The reason is, after finishing a dma request, the dma thread will trigger the interrupt and then clear the call back function. When guest get the interrupt , it will try to check the call back function, if it is set, then it will trigger a dma request again. So if the checking for

Fix virtual apic irq distribution. But currently we inject PIT irqs to cpu0 only. Also mute some warning messages. Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com> Signed-off-by: Xin Li <xin.b.li@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

This patch adds "wbinvd" instruction emulation for vm86 mode. This is needed when we bring up AP of SMP VMX guest. Signed-off-by: Xin Li <xin.b.li@intel.com> diff -r 94c6fc048d8e tools/firmware/vmxassist/vm86.c --- a/tools/firmware/vmxassist/vm86.c Fri Sep 23 11:52:43 2005 +++ b/tools/firmware/vmxassist/vm86.c Tue Sep 27 17:17:25 2005 @@ -752,6 +752,9 @@

The patch enables x86_32 PAE unmodified guests on 64-bit Xen when the hvm feature is present. We tested only Linux at this point, and we''ll improve the functionality as we test other guests. The SVM needs the equivalent changes to the vmc.c to get this functionality working, but this patch does not break the build. Signed-off-by: Jun Nakajima <jun.nakajima@intel.com>

To avoid MSR save/restore at every VM exit/entry time, we restore the x86_64 specific MSRs at domain switch time if modified. In VMX domains, we modify those upon requests from the guests to that end. Note that IA32_EFER.LME and IA32_EFER.LMA are saved/restored by H/W on every VM exit. For the usual domains (i.e. dom0 and domU), those MSRs are not modified once set at initialization time, so we

Currently the vector is not freed for MSI interrupt, the three patches fix the issue. The first patch(pirq.patch) move the get_free_pirq/map(unmap)_domain_pirq from arch/x86/physdev.c to arch/x86/irq.c, since that should be part of irq managment, no logic changes. The second patch(msi_vector_clean.patch) free the vector when the pirq is unmapped or when domain destroy. One thing need notice for

Propagate guest MSR writes to machine MSRs immediately Right now, we have an exposure between the time the MSR is written and used by an instruction such as syscall. If there is a context switch and we do vmx_do_restore_msrs(), everything goes fine. But if we don''t, then we execute the syscall with the wrong MSR. Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>

Currently the mmio_operands assumes writing to memory when operand 0 is register or immediate, this is false for cmp/test opcode. This patch resolve this problem, please review. Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com> Signed-off-by: Jun Nakajima <jun.nakajima@intel.com> Thanks Yunhong Jiang _______________________________________________ Xen-devel mailing list

Trivial change to emulate CLTS instruction in vmxassist. Relevant file - tools/firmware/vmxassist/vm86.c Signed-off-by: Kamala Narasimhan <kamala.narasimhan@citrix.com> Kamala _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

Any advice about the patch cr8-acceleration-3.patch? Hi Keir, could you give some comments? Thanks! -- Dexuan -----Original Message----- From: xen-devel-bounces@lists.xensource.com [mailto:xen-devel-bounces@lists.xensource.com] On Behalf Of Cui, Dexuan Sent: 2006年10月25日 11:12 To: Keir.Fraser@cl.cam.ac.uk Cc: xen-devel@lists.xensource.com Subject: [Xen-devel] [Patch][RESEND] Add hardware CR8

Extend the VMX intercept mechanism to include mmio as well as portio. Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com> Signed-off-by: Xiaofeng Ling <xiaofeng.ling@intel.com> Signed-off-by: Arun Sharma <arun.sharma@intel.com> diff -r febfcd0a1a0a -r 9a43d5c12b95 xen/include/asm-x86/vmx_platform.h --- a/xen/include/asm-x86/vmx_platform.h Thu Jun 30 03:20:48 2005 +++

Leendert, when I''m reading the vmxassist code, I think we need this patch, can you take a look for me? Thanks -Xin diff -r 47013962e411 tools/firmware/vmxassist/setup.c --- a/tools/firmware/vmxassist/setup.c Fri Feb 10 02:23:36 2006 +++ b/tools/firmware/vmxassist/setup.c Fri Feb 10 15:28:17 2006 @@ -363,7 +363,7 @@ initialize_real_mode = 1; cr0 = get_cr0(); -#ifndef

Patch 5 modify_pci: it provides small fix of aerdrv_core, add one new func of get_device by BDF Signed-off-by: Jiang Yunhong<yunhong.jiang@intel.com> Signed-off-by: Ke Liping<liping.ke@intel.com> Thanks& Regards, Criping _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

This patch add MSI support to passthrough HVM domain. Currently it only inercept access to MSI config space, no MSI-x support. Signed-off-by: Jiang Yunhong <yunhong.jiang@intel.com> Signed-off-by: Shan Haitao <haitao.shan@intel. <<msi_passthrough.patch>> com> Best Regards Haitao Shan _______________________________________________ Xen-devel mailing list

Keir Fraser wrote: > On 13 Sep 2005, at 03:40, Jiang, Yunhong wrote: > >> 1) I think the cpu_reset_interrupt() is a common API on qemu for >> hardware interrupt/exception etc,while clear the shared page is just >> for hardware interrupt. Of course, this function is currently used >> just for hardware interrupt since qemu works as a device model :) >> But

Sorry, please ignore this mail. (I attached the old patch...) -- Dexuan -----Original Message----- From: xen-devel-bounces@lists.xensource.com [mailto:xen-devel-bounces@lists.xensource.com] On Behalf Of Cui, Dexuan Sent: 2006年10月25日 11:07 To: Keir.Fraser@cl.cam.ac.uk Cc: xen-devel@lists.xensource.com Subject: [Xen-devel] [Patch][RESEND] Add hardware CR8 acceleration for TPRaccessing x64