similar to: [PATCH] build p2m mapping according to m2p mapping

So, Keir, can you please check in this patch? Thanks Yunhong Jiang >-----Original Message----- >From: xen-devel-bounces@lists.xensource.com >[mailto:xen-devel-bounces@lists.xensource.com] On Behalf Of >John Clemens >Sent: Tuesday, February 28, 2006 1:35 AM >To: Jiang, Yunhong >Cc: Li, Xin B; xen-devel@lists.xensource.com >Subject: [Xen-devel] Re: [PATCH] Fix qemu-dm

Hi, Keir: the gdtr information in oldctx is an address for guest, not for vmxassist. When access descriptor on guest gdt, we need to go through guest page table if guest enable paging. This error may happen if guest enable PE/PG in one instruction. This patch fix this issue. Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com> Signed-off-by: Xin Li <xin.b.li@intel.com> Thanks

Fix regs set/get decoding in VMXAssist. Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com> Signed-off-by: Xin Li <xin.b.li@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

Can you please check the vcpu status? I suspect one of the vcpu is blocked by halt instruction. Thanks Yunhong Jiang >-----Original Message----- >From: xen-devel-bounces@lists.xensource.com >[mailto:xen-devel-bounces@lists.xensource.com] On Behalf Of Tim Deegan >Sent: 2006年10月5日 23:55 >To: Li, Xin B >Cc: xen-devel@lists.xensource.com >Subject: Re: [Xen-devel] [PATCH] add

Hi, John Can you try the attached patch ? This issue can be reproduced on SMP platform, while the domain 0 is UP. The reason is, after finishing a dma request, the dma thread will trigger the interrupt and then clear the call back function. When guest get the interrupt , it will try to check the call back function, if it is set, then it will trigger a dma request again. So if the checking for

Fix virtual apic irq distribution. But currently we inject PIT irqs to cpu0 only. Also mute some warning messages. Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com> Signed-off-by: Xin Li <xin.b.li@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

The patch enables x86_32 PAE unmodified guests on 64-bit Xen when the hvm feature is present. We tested only Linux at this point, and we''ll improve the functionality as we test other guests. The SVM needs the equivalent changes to the vmc.c to get this functionality working, but this patch does not break the build. Signed-off-by: Jun Nakajima <jun.nakajima@intel.com>

And can we make p2m memory allocation from domain heap directly? -Xin _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

Noticed that on change set 12568, we change the valid_mfn to be in fact the mfn_valid(). Then on change set 12572, we change the shadow_set_p2m_entry() to use mfn_valid(). I''m a bit confused by this change. I think current meaning of mfn_valid() is to check if the mfn is valid RAM. It is ok for page table pages. But for p2m table, considering shadow for driver domain or considering IOMMU

Hello, how can a gfn become 0x555555 as checked in p2m.c:guest_physmap_add_entry() and p2m_alloc_table()? Looking further in p2m.c, audit_p2m() checks only for a 32bit value. So where is that magic number set, and why is it not a define to simplify grepping for users of that value? Olaf _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com

In sh_page_fault(), there are some code like following, why we think it is mmio only when paging_vcpu_mode_translate(v)? Thanks Yunhong Jiang /* What mfn is the guest trying to access? */ gfn = guest_l1e_get_gfn(gw.eff_l1e); gmfn = vcpu_gfn_to_mfn(v, gfn); mmio = (is_hvm_domain(d) && paging_vcpu_mode_translate(v) &&

>>What kinds of things are going to be added? ''platform.h'' is vague >>enough it could end up a dumping ground for all kinds of crud. >> > >To support HVM guest with RAM above 4G physical address space, we need >define a constant HVM_RAM_LIMIT_BELOW_4G, and physical address space >from HVM_RAM_LIMIT_BELOW_4G to 4G is reserved for PCI device MMIO use.

branch xen-unstable xen branch xen-unstable job build-i386 test xen-build Tree: qemuu git://xenbits.xen.org/staging/qemu-upstream-unstable.git Tree: xen git://xenbits.xen.org/xen.git *** Found and reproduced problem changeset *** Bug is in tree: xen git://xenbits.xen.org/xen.git Bug introduced: ae763e4224304983a1cde2fbb3d6e0c4d60b2688 Bug not present:

To avoid MSR save/restore at every VM exit/entry time, we restore the x86_64 specific MSRs at domain switch time if modified. In VMX domains, we modify those upon requests from the guests to that end. Note that IA32_EFER.LME and IA32_EFER.LMA are saved/restored by H/W on every VM exit. For the usual domains (i.e. dom0 and domU), those MSRs are not modified once set at initialization time, so we

Currently the vector is not freed for MSI interrupt, the three patches fix the issue. The first patch(pirq.patch) move the get_free_pirq/map(unmap)_domain_pirq from arch/x86/physdev.c to arch/x86/irq.c, since that should be part of irq managment, no logic changes. The second patch(msi_vector_clean.patch) free the vector when the pirq is unmapped or when domain destroy. One thing need notice for

Propagate guest MSR writes to machine MSRs immediately Right now, we have an exposure between the time the MSR is written and used by an instruction such as syscall. If there is a context switch and we do vmx_do_restore_msrs(), everything goes fine. But if we don''t, then we execute the syscall with the wrong MSR. Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>

Currently the mmio_operands assumes writing to memory when operand 0 is register or immediate, this is false for cmp/test opcode. This patch resolve this problem, please review. Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com> Signed-off-by: Jun Nakajima <jun.nakajima@intel.com> Thanks Yunhong Jiang _______________________________________________ Xen-devel mailing list

Hi, all Page offline can be used by many purpose, like memory offline, memory power management, proactive action when multiple CE error happen to one page etc. In virtualization environment without guest offline support, we think offline a page usually means replace the old page with a new one transparently to guest. Currently we are trying to add page offline support in Xen environment .

Any advice about the patch cr8-acceleration-3.patch? Hi Keir, could you give some comments? Thanks! -- Dexuan -----Original Message----- From: xen-devel-bounces@lists.xensource.com [mailto:xen-devel-bounces@lists.xensource.com] On Behalf Of Cui, Dexuan Sent: 2006年10月25日 11:12 To: Keir.Fraser@cl.cam.ac.uk Cc: xen-devel@lists.xensource.com Subject: [Xen-devel] [Patch][RESEND] Add hardware CR8