similar to: ZFS volume turned into a socket - any way to restore data?

Displaying 20 results from an estimated 300 matches similar to: "ZFS volume turned into a socket - any way to restore data?"

2007 Jun 21
2
Bug in "zpool history"
Hi, I was playing around with NexentaCP and its zfs boot facility. I tried to figure out how what commands to run and I ran zpool history like this # zpool history 2007-06-20.10:19:46 zfs snapshot syspool/rootfs at mysnapshot 2007-06-20.10:20:03 zfs clone syspool/rootfs at mysnapshot syspool/myrootfs 2007-06-20.10:23:21 zfs set bootfs=syspool/myrootfs syspool As you can see it says I did a
2010 Jun 17
1
How to remove zpool name "alias"
I''m not sure about the right naming, but here is what I did and what my problem is now: I imported a "syspool" as another name (that''s why I use the naming "alias"), using the following command: zpool import -f syspool original My problem is that after reboot, the syspool is available both as "syspool" and "original" pool names at the same
2009 May 01
5
PyGrub + ZFS: getbootstring. How it works?
I have NexentaCP2 (Opensolaris b104+). Parameters for the kernel: ''zfs-bootfs=syspool/rootfs-nmu-000,bootpath=/xpvd/xdf@0:a'' Pygrub returns: ''zfs-bootfs=syspool/30,bootpath=/xpvd/xdf@0:a'' Result: Boot with pygrub don''t work. What is "30" in syspool/30 ? _______________________________________________ Xen-users mailing list
2010 Jun 28
23
zpool import hangs indefinitely (retry post in parts; too long?)
Now at 36 hours since zdb process start and: PID USERNAME SIZE RSS STATE PRI NICE TIME CPU PROCESS/NLWP 827 root 4936M 4931M sleep 59 0 0:50:47 0.2% zdb/209 Idling at 0.2% processor for nearly the past 24 hours... feels very stuck. Thoughts on how to determine where and why? -- This message posted from opensolaris.org
2010 May 07
0
confused about zpool import -f and export
Hi, all, I think I''m missing a concept with import and export. I''m working on installing a Nexenta b134 system under Xen, and I have to run the installer under hvm mode, then I''m trying to get it back up under pv mode. In that process the controller names change, and that''s where I''m getting tripped up. I do a successful install, then I boot OK,
2010 Aug 04
1
Blktap-control under 2.6.32.16-1.2.108.xendom0.fc13.x86_64
1. Attempt to load Nexenta under 2.6.32.16-1.2.108.xendom0.fc13.x86_64 Xen 4.0.1-rc6-pre & 2.6.32.16-1.2.108.xendom0.fc13.x86_64 on top F13 [root@fedora13 NexentaStor-Community-3.0.2]# uname -a Linux fedora13 2.6.32.16-1.2.108.xendom0.fc13.x86_64 #1 SMP Fri Jul 23 17:09:30 MSD 2010 x86_64 x86_64 x86_64 GNU/Linux [root@fedora13 NexentaStor-Community-3.0.2]# xm create -c
2008 Nov 17
2
[LLVMdev] Does current LLVM target-independent code generator supports my strange chip?
I have a very strange and complicate H/W platform. It has many registers in one format. The register format is: ------------------------------ ---------------------------------------------------------------------------------------- | 24-bit | 24-bit | 24-bit | 24-bit |
2008 Nov 20
4
[LLVMdev] Does current LLVM target-independent code generator supports my strange chip?
Because each channel contains 24-bit, so.. what is the llvm::SimpleValueType I should use for each channel? the current llvm::SimpleValueType contains i1, i8, i16, i32, i64, f32, f64, f80, none of them are fit one channel (24-bit). I think I can use i32 or f32 to represent each 24-bit channel, if the runtime result of some machine instructions exceeds 23-bit (1 bit is for sign), then it is an
2008 Nov 18
0
[LLVMdev] Does current LLVM target-independent code generator supports my strange chip?
Why not model each channel as a separate physical register? Evan On Nov 17, 2008, at 6:36 AM, Wei wrote: > I have a very strange and complicate H/W platform. > It has many registers in one format. > The register format is: > > ------------------------------ > ---------------------------------------------------------------------------------------- > | 24-bit
2010 Jun 21
7
Third release candidate for Xen 4.0.1
Folks, The tag 4.0.1-rc3 has been added to http://xenbits.xensource.com/xen-4.0-testing.hg Please test! -- Keir _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel
2010 Dec 08
5
very slow boot: stuck at mounting zfs filesystems
Hello list, I''m having trouble with a server holding a lot of data. After a few months of uptime, it is currently rebooting from a lockup (reason unknown so far) but it is taking hours to boot up again. The boot process is stuck at the stage where it says: mounting zfs filesystems (1/5) the machine responds to pings and keystrokes. I can see disk activity; the disk leds blink one after
2008 Nov 21
0
[LLVMdev] Does current LLVM target-independent code generator supports my strange chip?
24 bit is not unusual in the DSP world. I suppose int == 24 bit integer for some of these chips? There isn't a i24 simple type. However, you can create an extended integer type. See getExtendedIntegerVT. It's almost guaranteed you will have to change a chunk of target independent codegen to support the use of an extended type though. Evan On Nov 20, 2008, at 4:46 AM, Wei wrote:
2008 Sep 05
0
raidz pool metadata corrupted nexanta-core->freenas 0.7->nexanta-core
I made a bad judgment and now my raidz pool is corrupted. I have a raidz pool running on Opensolaris b85. I wanted to try out freenas 0.7 and tried to add my pool to freenas. After adding the zfs disk, vdev and pool. I decided to back out and went back to opensolaris. Now my raidz pool will not mount and got the following errors. Hope someone expert can help me recover from this error.
2003 Dec 29
1
Agent setup
Dear Group, I have been successful in setting up the Agents, queues and getting agents to log in. Is there a way that I could configure the system so that the agent is called back. i.e. the agent logs into the system, a call is destined for them and their phone rings. If some one has this setup I would be very interested in hearing from them. Warm Regards and Thanks --------------- Shad
2008 Nov 20
0
[LLVMdev] Does current LLVM target-independent code generator supports my strange chip?
This is similar to ATI's R300/R420 pixel shaders. I'm familiar with this hardware, but not really an LLVM expert (working on a code generator myself, but learning as I go). Do you have 24-bit integer operations, or just floating point? What about load/store? Are you looking to run large C programs with complex data structures, or just comparatively simple math functions (i.e. a
2018 Mar 13
32
[PATCH v2 00/27] x86: PIE support and option to extend KASLR randomization
Changes: - patch v2: - Adapt patch to work post KPTI and compiler changes - Redo all performance testing with latest configs and compilers - Simplify mov macro on PIE (MOVABS now) - Reduce GOT footprint - patch v1: - Simplify ftrace implementation. - Use gcc mstack-protector-guard-reg=%gs with PIE when possible. - rfc v3: - Use --emit-relocs instead of -pie to reduce
2018 Mar 13
32
[PATCH v2 00/27] x86: PIE support and option to extend KASLR randomization
Changes: - patch v2: - Adapt patch to work post KPTI and compiler changes - Redo all performance testing with latest configs and compilers - Simplify mov macro on PIE (MOVABS now) - Reduce GOT footprint - patch v1: - Simplify ftrace implementation. - Use gcc mstack-protector-guard-reg=%gs with PIE when possible. - rfc v3: - Use --emit-relocs instead of -pie to reduce
2017 Oct 04
28
x86: PIE support and option to extend KASLR randomization
These patches make the changes necessary to build the kernel as Position Independent Executable (PIE) on x86_64. A PIE kernel can be relocated below the top 2G of the virtual address space. It allows to optionally extend the KASLR randomization range from 1G to 3G. Thanks a lot to Ard Biesheuvel & Kees Cook on their feedback on compiler changes, PIE support and KASLR in general. Thanks to
2017 Oct 04
28
x86: PIE support and option to extend KASLR randomization
These patches make the changes necessary to build the kernel as Position Independent Executable (PIE) on x86_64. A PIE kernel can be relocated below the top 2G of the virtual address space. It allows to optionally extend the KASLR randomization range from 1G to 3G. Thanks a lot to Ard Biesheuvel & Kees Cook on their feedback on compiler changes, PIE support and KASLR in general. Thanks to
2018 May 23
33
[PATCH v3 00/27] x86: PIE support and option to extend KASLR randomization
Changes: - patch v3: - Update on message to describe longer term PIE goal. - Minor change on ftrace if condition. - Changed code using xchgq. - patch v2: - Adapt patch to work post KPTI and compiler changes - Redo all performance testing with latest configs and compilers - Simplify mov macro on PIE (MOVABS now) - Reduce GOT footprint - patch v1: - Simplify ftrace