similar to: capturing cpl changes

Hi, Keir, This patch is to fix the problem of Linux guest installation failure and Windows 2000 boot failure.       In the early code, we use vmx_vmexit_handler() -> vmx_io_instruction() function to emulate I/O instructions. But now, we use vmx_vmexit_handler() -> handle_mmio -> hvm_emulate_one() -> x86_emulate() to emulate I/O instructions. Also nowadays, the realmode

Hi, kdb: to debug xen hypervisor, could also debug guests gdbsx: to debug PV/HVM linux guests The tree is : http://xenbits.xensource.com/ext/debuggers.hg See README-dbg. You''ll need to setup serial access for kdb. Thanks, Mukesh > > Hi Dan, > > I''m currently using your version of ssplitd as it is. I haven''t tried > kdb. For some reason I

Direct calls perform better, so we should prefer them and use indirect ones only when there indeed is a need for indirection. Signed-off-by: Jan Beulich <jbeulich@suse.com> --- a/xen/arch/x86/apic.c +++ b/xen/arch/x86/apic.c @@ -1373,7 +1373,7 @@ void error_interrupt(struct cpu_user_reg void pmu_apic_interrupt(struct cpu_user_regs *regs) { ack_APIC_irq(); -

This issue I am encountering seems to only happen on multi-socket machines. It also does not help that the only multi-socket box I have is an Romley-EP (so two socket SandyBridge CPUs). The other SandyBridge boxes I''ve (one socket) are not showing this. Granted they are also a different model (42). The problem is that when I run ''perf top'' within an SMP PVHVM guest,

[VMX] Add support for Pause-Loop Exiting New NHM processors will support Pause-Loop Exiting by adding 2 VM-execution control fields: PLE_Gap - upper bound on the amount of time between two successive executions of PAUSE in a loop. PLE_Window - upper bound on the amount of time a guest is allowed to execute in a PAUSE loop If the time, between this execution of PAUSE

hello list: I add some code to xen-3.1.0-src\xen\arch\x86\hvm\vmx\vmx.c to export some information when vmx_vmexit_handler() executed: ------------------------------------------------------------------------------------------------- --- vmx.c 2007-05-18 22:45:22.000000000 +0800 +++ vmx-patch.c 2008-11-24 14:19:18.000000000 +0800 @@ -50,7 +50,9 @@ #include <asm/hvm/vpt.h> #include

yujiageng734 wrote: > Hi, > > I am trying to use your gdbsx. But I don''t know how to make a 32bit > dom0 running on 64bit hypervisor. Can you explain this for me? I''m > extremely grateful to you. Hmm.. good question. I don''t know, it''s always done for me here. One option would be to just download OVM from edelivery.oracle.com,

Make the Linux kernel able to run at CPL 0, 1, or 2. There are a few limited places where CPL-0 is assumed, and they can be converted very efficiently into a supervisor CPL check instead of a CPL-0 check. This step prepares the kernel for running in direct execution under a hypervisor. Note the user_mode_vm macro used in ptrace.h is very similar to the flag mixing of EFLAGS and CS used to test

Make the Linux kernel able to run at CPL 0, 1, or 2. There are a few limited places where CPL-0 is assumed, and they can be converted very efficiently into a supervisor CPL check instead of a CPL-0 check. This step prepares the kernel for running in direct execution under a hypervisor. Note the user_mode_vm macro used in ptrace.h is very similar to the flag mixing of EFLAGS and CS used to test

Hello. I'm trying to use Dolphin Emulator (32bit, revision 7120) with Wine so I could use it's Direct3D capabilities (hence why I don't use the Linux port). I have two problems doing so: 1. I'm using Ubuntu 64bit, with Wine 1.3.13. Even though Dolphin is 32bit, I'm getting the error: Code: "Trying to load PE image for unsupported architecture (AMD-64)" 2. I get 2

>Since this happens early in HVM guest boot, I suggest adding tracing to >vmx_vmexit_handler() to dump registers on every MSR write. >Something like >this early on in the function: > if ( reason == EXIT_REASON_MSR_WRITE ) { > printk("regs==%p, guest_regs==%p\n", &regs, >guest_cpu_user_regs()); > show_registers(&regs); > } > >This will

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Xen Security Advisory CVE-2013-1917 / XSA-44 version 2 Xen PV DoS vulnerability with SYSENTER UPDATES IN VERSION 2 ==================== Public release. ISSUE DESCRIPTION ================= The SYSENTER instruction can be used by PV guests to accelerate system call processing. This

I implemented sysenter for 32-on-64, since it seemed straightforward enough. It mostly works, but every now and again I get vcpus just hanging in blocked state, as if events are being lost or ignored. Its very similar to the symptoms that other people have reported against the pvops kernel, which I have not managed to reproduce. Perhaps using sysenter is exacerbating an existing bug...

In compat mode, the return value here was uninitialized. Signed-off-by: Zachary Amsden <zach@vmware.com> diff -r 1fda49a076ed arch/i386/kernel/sysenter.c --- a/arch/i386/kernel/sysenter.c Fri Apr 06 14:25:09 2007 -0700 +++ b/arch/i386/kernel/sysenter.c Fri Apr 06 14:27:31 2007 -0700 @@ -254,7 +254,7 @@ int arch_setup_additional_pages(struct l { struct mm_struct *mm = current->mm;

In compat mode, the return value here was uninitialized. Signed-off-by: Zachary Amsden <zach@vmware.com> diff -r 1fda49a076ed arch/i386/kernel/sysenter.c --- a/arch/i386/kernel/sysenter.c Fri Apr 06 14:25:09 2007 -0700 +++ b/arch/i386/kernel/sysenter.c Fri Apr 06 14:27:31 2007 -0700 @@ -254,7 +254,7 @@ int arch_setup_additional_pages(struct l { struct mm_struct *mm = current->mm;

The SYSENTER instruction jumps to a pre-programmed address at privilege level 0. We must not allow execution of guest code at that privilege level, so disable sysenter when we enter the guest (and re-enable it on return). This fixes current case where guest userspace can crash host. This save/restore adds 3% to guest context switch times. (If only there were some kind of scheduler hook or

The SYSENTER instruction jumps to a pre-programmed address at privilege level 0. We must not allow execution of guest code at that privilege level, so disable sysenter when we enter the guest (and re-enable it on return). This fixes current case where guest userspace can crash host. This save/restore adds 3% to guest context switch times. (If only there were some kind of scheduler hook or

>>However, in case (2) the i386 guest kernel unconditionally goes for >>sysenter, and the hypervisor will accept this because CPUID has advertised >>SEP. *But* AMD CPUs do not support sysenter except in legacy mode! The >>correct thing to do is to use syscall. The hypervisor 32-on-64 compat code >>would accept CALLBACKTYPE_syscall, but the Linux i386 code here

This adds support for CONFIG_COMPAT_VDSO. As this will certainly raise questions, I left in the code needed for an alternative approach (which requires mode C code, but less build script changes). Signed-off-by: Jan Beulich <jbeulich@novell.com> Index: head-2007-02-27/arch/i386/Kconfig =================================================================== ---

This adds support for CONFIG_COMPAT_VDSO. As this will certainly raise questions, I left in the code needed for an alternative approach (which requires mode C code, but less build script changes). Signed-off-by: Jan Beulich <jbeulich@novell.com> Index: head-2007-02-27/arch/i386/Kconfig =================================================================== ---