Displaying 20 results from an estimated 1100 matches similar to: "quota-fs: get nfs GROUP quota (patch)"
2005 Jun 03
2
POP3 download problem
Hi All
I am experiencing a mail download problem with dovecot's pop3 protocol. We
use outlook XP 2002 mail clients and I have setup a mail system with pop
accounts on a Fedora 2 installation using dovecot.
Some of the clients download email fine but others do not download email and
also do not give any error messages. I have enabled the "verbose" options in
the
2008 Sep 18
1
PNG file don't run on mac's?
Een ingesloten tekst met niet-gespecificeerde tekenset is gescrubt ...
Naam: niet beschikbaar
URL: <https://stat.ethz.ch/pipermail/r-help/attachments/20080918/ed87aa31/attachment.pl>
2006 Jan 21
3
help... why can''t Iuse data from two tables in the same view
I am new to Rails and Ruby, and to OO languages, and seem to be making a
very silly mistake somewhere here. Can anybody help?
I am trying to write an application which involves ''exercises'', each of
which consists of several ''templates''. This is based on MySQL tables
with these names. I have models and controllers, built with the Rails
Scaffold, for both
2009 Feb 03
2
[LLVMdev] rol/ror llvm instruction set
Hi,
I was looking around the LLVM instruction set and I failed to find ROL and ROR instructions. Is there any plans on adding these instructions to LLVM?
The reason that I am asking is for cryptographical algorithms which are becoming ever more important rotation is a major operation. Thus including such instruction could reduce 3 instructions {shl, shr, or} into {rol | ror} which could gain
2009 Feb 03
2
[LLVMdev] rol/ror llvm instruction set
On Feb 3, 2009, at 2:35 PMPST, Mike Stump wrote:
> On Feb 3, 2009, at 2:28 PM, Kasra wrote:
>> I was looking around the LLVM instruction set and I failed to find
>> ROL and ROR instructions. Is there any plans on adding these
>> instructions to LLVM?
>
> Not sure what you mean:
He's referring to the LLVM IR, I think, and it's true that doesn't
have
2009 Feb 03
6
[LLVMdev] rol/ror llvm instruction set
--- On Tue, 2/3/09, Bill Wendling <isanbard at gmail.com> wrote:
> From: Bill Wendling <isanbard at gmail.com>
> Subject: Re: [LLVMdev] rol/ror llvm instruction set
> To: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu>
> Cc: kasra_n500 at yahoo.com
> Date: Tuesday, February 3, 2009, 2:52 PM
> On Tue, Feb 3, 2009 at 2:45 PM, Dale Johannesen
2009 Feb 03
0
[LLVMdev] rol/ror llvm instruction set
On Tue, Feb 3, 2009 at 2:45 PM, Dale Johannesen <dalej at apple.com> wrote:
>
> On Feb 3, 2009, at 2:35 PMPST, Mike Stump wrote:
>
>> On Feb 3, 2009, at 2:28 PM, Kasra wrote:
>>> I was looking around the LLVM instruction set and I failed to find
>>> ROL and ROR instructions. Is there any plans on adding these
>>> instructions to LLVM?
>>
2007 Feb 27
1
dovecot-auth (1.0rc24) on Solaris seems broken.
I've trying to get dovecot-auth to talk to exim and have been running
debugging on both sides.
I've added the line:
i_info("auth_client_input: client disconnected: %s", strerror(errno));
just after the "case -1" in the first switch statement in:
auth-client-connection.c: auth_client_input()
and get this in the logs:
dovecot: Feb 27 13:35:09 Info: auth(default):
2007 May 09
2
PATCH: Deliver looses mail and DSN if Return-Path is missing
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1
Hello,
Dovecot v1.0.0
if there is no Return-Path in the message and Deliver cannot deliver the
message, no DSN is sent _and_ the MTA is returned 0 (aka success) return
code, which leads to mail loss.
This is not the case, when the message actually finds a Return-Path, but
fails to invoke the MTA.
- --- src/deliver/mail-send.c (revision 47)
+++
2013 Nov 09
2
[LLVMdev] [Target] Custom Lowering expansion of 32-bit ISD::SHL, ISD::SHR without barrel shifter
Dear All,
I am trying to custom lower 32-bit ISD::SHL and SHR in a backend for 6502
family CPUs. The particular subtarget has 16-bit registers at most, so a
32-bit result is not legal. Normally, if you mark this as "Legal" or
"Expand", then it will expand the node into a more nodes as follows in an
example:
shl i32 %a , 2
=> high_sdvalue = (or (shr %b, 14), (shl %c, 2) )
2009 Feb 03
0
[LLVMdev] rol/ror llvm instruction set
On Feb 3, 2009, at 2:28 PM, Kasra wrote:
> I was looking around the LLVM instruction set and I failed to find
> ROL and ROR instructions. Is there any plans on adding these
> instructions to LLVM?
Not sure what you mean:
$ cat t.c
unsigned int rol(unsigned int i) {
return i << 1 | i >> 31;
}
mrs $ clang -S t.c -O2
mrs $ cat t.s
.text
.align 4,0x90
.globl _rol
2009 Feb 04
0
[LLVMdev] rol/ror llvm instruction set
On Feb 3, 2009, at 3:54 PM, Kasra wrote:
> I guess the backends could know about the instructions. But I am not
> convinced why it is beneficial not to have ROR and ROL instructions
> within llvm.
>
How would it be beneficial to have them, if we already generate them
at the target level properly? Adding instructions "just because"
doesn't seem wise.
-Owen
2005 Mar 11
3
IP in rawlog
Hi,
i'm using dovecot with rawlog enabled. Well, i need to log the IP of the
user, too. Could you give me a hint, how this can be implemented?
Thanks and regards,
Andreas Goertz.
2020 May 30
3
Cargar archivo .RData desde OneDrive, Google Drive o Dropbox
Hola, gracias por la respuesta.
Yo también puedo descargar el fichero pero no lo carga de forma correcta:
> drive_download("
https://drive.google.com/file/d/1iN7rT-W8WoXsdBpKzxcatFx7nGPWNkuz/view?usp=sharing
",
+ overwrite = TRUE, verbose = TRUE)
File downloaded:
* restaurant.RData
Saved locally as:
* restaurant.RData
> restaurant <-
2019 Jun 04
3
Incluir un rango de varias variables explicativas a un modelo
Hola, gracias por la respuesta,
No me funcionó debido a que los nombres de las variables no están seriadas,
es decir, los nombres de las variables son del tipo: x23 x25 x30, x301
x320, x80. Entonces me da este error:
Error in eval(predvars, data, env) : object 'pot24' not found. Debido a que
pot24 no existe, ya que de pot23 se brinca a pot30.
En Stata es algo muy simple de hacer, solo
2007 Sep 03
2
recipient delimiter results in sieve errors
Hello,
I'm using dovecot 1.0.3 and Dovecot Sieve plugin 1.0.2. Sieve script works
fine with normal addresses, like user at domain.., and messages marked with
"X-Spam-Flag: YES" are delivered directly to INBOX.Spam.
To make deliver understand recipient_delimiter I tried two methods, the
first one as per wiki (tweaking postfix master.cf), and the second one by
tweaking
2009 Feb 04
1
[LLVMdev] rol/ror llvm instruction set
--- On Tue, 2/3/09, Owen Anderson <resistor at mac.com> wrote:
> From: Owen Anderson <resistor at mac.com>
> Subject: Re: [LLVMdev] rol/ror llvm instruction set
> To: kasra_n500 at yahoo.com, "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu>
> Date: Tuesday, February 3, 2009, 4:20 PM
> On Feb 3, 2009, at 3:54 PM, Kasra wrote:
> > I guess the
2013 Nov 10
2
[LLVMdev] [Target] Custom Lowering expansion of 32-bit ISD::SHL, ISD::SHR without barrel shifter
I forgot to mention that I used EXTRACT_ELEMENT in my backend to get the high and low parts of an SDValue.
On 10 Nov 2013, at 17:50, Steve Montgomery <stephen.montgomery3 at btinternet.com> wrote:
> I had a similar problem with a backend for the 68HC12 family which also has no barrel shifter. Some 68HC12 CPUs support shift for just one of the 16-bit registers and only support rotation
2019 Jun 02
3
Incluir un rango de varias variables explicativas a un modelo
Hola,
Quiero especificar una ecuación con varias variables explicativas de una
manera eficiente sin necesidad de escribir todas y cada una. Tengo un
conjunto de variables (junto con otras) dentro de una base de datos que se
llaman pot23 pot311 pot312 pot 316 pot317........... pot80. No
necesariamente están secuenciadas. Quisiera saber cómo indicar que incluya
todas las variables de pot23 a pot80
2016 Dec 08
2
BSWAP matching in codegen
>> Are you sure there isn't any test coverage? As far as I can tell, the tests from https://reviews.llvm.org/rL133503 are still in the tree.
I looked at those, but none of them include the full pattern that decomposes into bswap and rol. I debugged through the X86 bswap.ll test and verified none of those cases make it through MatchBSwapHWord (they get handled in MatchBSwapHWordLow