Displaying 20 results from an estimated 2000 matches similar to: "Plans to improve reference classes?"
2015 Jun 22
0
Plans to improve reference classes?
Apart from speed, the most important advantage of R6 over ref classes
is that's it easy to subclass a class defined in package A in package
B. This is currently difficult with ref classes because of the way it
does scoping. (And I think it's difficult to fix without fundamentally
changing how ref classes work)
Hadley
On Mon, Jun 22, 2015 at 8:49 AM, Michael Lawrence
<lawrence.michael
2015 Jun 23
3
Plans to improve reference classes?
Could of requests:
1) Is there any example or writeup on the difficulties of extending
reference classes across packages? Just so I can fully understand the
issues.
2) In what sorts of situations does the performance of reference
classes cause problems? Sure, it's an order of magnitude slower than
constructing a simple environment, but those timings are in
microseconds, so one would need a
2018 Sep 12
2
Environments and parallel processing
While using parallelization R seems to clone all environments (that are normally passed by reference) that are returned from a child process. In particular, consider the following example:
library(parallel)
env1 <- new.env()
envs2 <- lapply(1:4, function(x) env1)
cl<-makeCluster(2, type="FORK")
envs3 <- parLapply(cl, 1:4, function(x) env1)
envs4 <- parLapply(cl, 1:4,
2018 Sep 12
0
Environments and parallel processing
This is all normal, a fork cluster works with processes, that do not
share memory. When you create a fork cluster, you create a new
process, that has the same memory layout as the parent. But from this
moment its memory is independent of the parent process. When parLapply
is done, the results are serialized and copied back to the parent
process. The serialized environment is independent of the
2017 Nov 15
2
R6 object that is a list of referenced object
Dear community,
I am having a class, let's say Person,
Person <- R6Class("Person",
public = list(
idPerson = NULL,
name = NULL,
age = NULL,
initialize = function(idPerson = NA, name = NA, age = NA) {
self$idPerson <- idPerson
2017 Nov 16
0
R6 object that is a list of referenced object
See below.
On Wed, 15 Nov 2017, Cristina Pascual wrote:
> Dear community,
>
> I am having a class, let's say Person,
>
> Person <- R6Class("Person",
> public = list(
> idPerson = NULL,
> name = NULL,
> age = NULL,
> initialize =
2024 Mar 11
1
R6 "classname" and generator name
I'm writing some code that does a bit of introspection of R6 classes and am
wondering about the "classname" parameter. Its the first parameter to the
"R6Class" class generator generator function, and the few examples I've
looked at on CRAN set it the same as the name of the generator function,
for example, from the docs:
Queue <- R6Class("Queue", .....)
2016 Dec 16
2
Upgrading a package to which other packages are LinkingTo
On 16/12/2016 12:35 PM, Karl Millar wrote:
> A couple of points:
> - rebuilding dependent packages is needed if there is an ABI change,
> not just an API change. For packages like Rcpp which export inline
> functions or macros that might have changed, this is potentially any
> change to existing functions, but for packages like Matrix, it isn't
> really an issue at all
1999 Jul 17
1
RPM for gss package
Has anyone posted an RPM (for i386) for Dr. Chong Gu's new gss package?
I am trying to install it on a Linux system too small to compile
the Fortran code directly.
Thanks for any help.
Peter Bouman
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Send "info", "help",
2020 Apr 11
1
Issues with usbhid-ups on TrippLite INTERNET600U
Hello,
I am trying to get my synology DS 418play to connect to my new
INTERNET600U UPS, but it appears not to work. I contacted TrippLite and
they said the unit is using a new comm protocol 3024. Is there a way to
make this work with usbhid-ups?
More details of my story here:
https://community.synology.com/enu/forum/1/post/132984
Thanks for your help!
-Troy
1999 Jul 10
1
Creating shared libraries for dyn.load() in R
Dear R-users,
I am working to install Chong Gu's new gss library on my Linux system
(Redhat 5.1/i386), and have run into the following roadblock: Dr. Gu's R
code is a front end for a package of Fortran routines called RKPACK. While
I have no trouble compiling
the individual bits of Fortran code with fort77 in Linux, I don't know how
to link the resulting *.o files into a shared
2017 Oct 18
1
conformal predictions
Dear community,
I want to use conformal prediction to measure how good are my svm-regression predictions (having used library e1071).
I have gone through the conformal package documentation. But I'm pretty newer and need some more and detailed examples.
Can anybody help me?
Thanks in advance,
[[alternative HTML version deleted]]
2017 Oct 09
4
{ARM} IfConversion does not detect BX instruction as a branch
Hi all,
I got a silly bug when compiling our project with the latest Clang.
Here's the outputted assembly:
> tst r3, #255
> strbeq r6, [r7]
> ldreq r6, [r4, r6, lsl #2]
> strne r6, [r7, #4]
> ldr r6, [r4, r6, lsl #2]
> bx r6
For the code to execute correctly, either the _ldr_ should be a _ldrne_
instruction or the _ldreq_ instruction should be removed. The error
seems to
2014 Feb 08
3
[PATCH 1/2] arm: Use the UAL syntax for ldr<cc>h instructions
On Fri, 7 Feb 2014, Timothy B. Terriberry wrote:
> Martin Storsjo wrote:
>> This is required in order to build using the built-in assembler
>> in clang.
>
> These patches break the gcc build (with "Error: bad instruction").
Ah, right, sorry about that.
> Documentation I've seen is contradictory on which order ({cond}{size} or
> {size}{cond}) is correct.
2010 Feb 11
3
[LLVMdev] Metadata
On Thursday 11 February 2010 13:31:58 David Greene wrote:
> > Putting a bit (or multiple bits) in MachineMemOperand for this
> > would also make sense.
>
> Is there any chance a MachineMemOperand will be shared by multiple
> instructions?
So I tried to do this:
%r8 = load <2 x double>* %r6, align 16, !"nontemporal"
and the assembler doesn't like it.
2017 Nov 01
2
[PATCH] pmu/fuc: don't use movw directly anymore
fixes compilation issues with recent envytools, because movw was removed
from fuc5, because it doesn't exist there anymore. The current code is
most likely broken for fuc5 hardware as well and might have triggered all
kinds of random memory reclocking fails.
Changes in fuc3 binaries are tue do opcode optimizations using shorter
opcodes when possible.
Signed-off-by: Karol Herbst <kherbst
2010 Feb 11
0
[LLVMdev] Metadata
On Thursday 11 February 2010 14:05:21 David Greene wrote:
> Either ParseLoad and probably other instructions need to look for metadata
> explicitly or ParseOptionalCommaAlign needs to know about general metadata.
>
> My inkling is to fix ParseOptionalCommaAlign. Sound reasonable?
Well, that's a rat's nest. I backed up and thought maybe I have the metadata
syntax wrong.
So
2015 May 21
2
[LLVMdev] How can I remove these redundant copy between registers?
Hi,
I've been working on a Blackfin backend (llvm-3.6.0) based on the previous
one that was removed in llvm-3.1.
llc generates codes like this:
29 p1 = r2;
30 r5 = [p1];
31 p1 = r2;
32 r6 = [p1 + 4];
33 r5 = r6 + r5;
34 r6 = [p0 + -4];
35 r5 *= r6;
36 p1 = r2;
37 r6 = [p1 + 8];
38 p1 = r2;
p1 and r2 are in different register classes.
A p*
2020 Apr 07
2
[ARM] Register pressure with -mthumb forces register reload before each call
If I'm understanding what's going on in this test correctly, what's happening is:
* ARMTargetLowering::LowerCall prefers indirect calls when a function is called at least 3 times in minsize
* In thumb 1 (without -fno-omit-frame-pointer) we have effectively only 3 callee-saved registers (r4-r6)
* The function has three arguments, so those three plus the register we need to hold the
2014 Jul 17
2
[LLVMdev] [compiler-rt] CMake bug in building ARM builtins library
On 7/16/14, 6:09 PM, sgundapa wrote:
> I see a couple of issues here.
>
> If I include .S files for ARM, the –no-integrated-as path complains about
> Assembler errors.
>
> The integrated-as path works fine though.
>
These are very likely just differences between the old ARM assembler syntax and
the new 'Unified' syntax. Can you use an assembler that accepts UAL