similar to: Encoding performance on ARM7/9 ?

Displaying 20 results from an estimated 7000 matches similar to: "Encoding performance on ARM7/9 ?"

2007 Nov 06
5
OGG decoding/multi-channel mixing
Hi All, Currently I am investigating how interesting OGG is for me. The most important requirements are: - Decoding on embedded hardware, ARM7 or ARM9. - Mixing multiple audio streams/files on embedded hardware First of all how difficult is it to decode OGG on an ARM7/9 processor? I read that OGG decoding needs floating point support? Secondly I would like to know how many MIPS are needed to
2008 Sep 17
2
[LLVMdev] Status of LLVM ARM port
Good day, I have looked around for this information, but I have not been able to gain a clear understanding: what is the status of the LLVM ARM backend? That is, do the following work: 1. Generating Thumb code: I saw a video online where they describe an issue with using the ARM Thumb back-end 2. Generating code for ARM9 (ARMv5?) or ARM7 (ARMv4): again, the same presentation
2011 Oct 13
2
[LLVMdev] LLC ARM Backend maintainer
Evan, > I'm the code owner of LLVM codegen and targets. I'm also the one of main developers on the original ARM target. That means, I would make the decisions on major development on ARM target if there are decisions to be made. > > But my role is very different from what people are looking for in this thread. To properly qualify a target like ARM which are supported on many
2004 Dec 10
1
Decoder performance
Hi all, I'm thinking of using Speex for an embedded project. I would only need the decode part. My question is what percentage of the CPU is used on an optimized (assembly will be done) SH4 or ARM7 or ARM9 speex decoder running at 100Mhz. Thanks, Bolt __________________________________ Do you Yahoo!? Jazz up your holiday email with celebrity designs. Learn more.
2008 Jun 24
4
[LLVMdev] jit DLLs
Are JIT DLLs supported? The idea is to use llvm to put performance sensitive code into a DLL that a Windows app can then use. This would build the performance sensitive code on the target machine making it possible to exploit CPU specific x86 vector instructions. The code that calls fn's in the DLL should, ideally, be unaware that a llvm JIT is being used. -- Øyvind Harboe
2008 Oct 09
2
[LLVMdev] Status of LLVM ARM port
I have a question regarding ARM support. It was mentioned in mails below that LLVM supports ARM v6 but a lot of ARM v6 instructions are actually missing from ARM ISA description files( e.g. Media Instructions). Is there any documentation mentioning the unsupported parts of v6 version Thanks --Kapil On Thu, Sep 18, 2008 at 2:14 PM, Evan Cheng <evan.cheng at apple.com> wrote: > > On
2005 Feb 15
1
Is real-time encoding possible with ARM7 @ 66mHz?
Hi, I have the encoder running on an ARM7 at 66mHz and it takes about 2-times real-time to encode a monophonic pcm file. Both quality and complexity are set to 3. I am using the ADS 1.2 tool-chain which seems to optimize C pretty well. I cannot use the inline ARM assy code because the operations used are only available for the V5 and up core. I would be grateful for any thoughts or
2006 Mar 29
1
ARM7 decode resource requirements
Hi Jean-Marc Thanks, >>>> I've never measured that, but it shouldn't take too much space, especially if you disable all the code (and possibly codebooks) that aren't used. so the 100kbyte ROM value quoted by Tom in his earlier mail should reduce if I cut out all the encoder code? Ta John -----Original Message----- From: Jean-Marc Valin
2008 Sep 18
0
[LLVMdev] Status of LLVM ARM port
On Sep 17, 2008, at 3:00 PM, Tyler Wilson wrote: > Good day, > > I have looked around for this information, but I have not been able > to gain a clear understanding: what is the status of the LLVM ARM > backend? That is, do the following work: > > 1. Generating Thumb code: I saw a video online where they > describe an issue with using the ARM Thumb back-end
2008 Jun 22
1
[LLVMdev] Backend for the ZPU - a stack based / zero operand CPU
On Fri, 20 Jun 2008, [ISO-8859-1] ?yvind Harboe wrote: >> The ZPU has two instructions that I'd also like to use. These instructions >> can push a value from deeper down on the stack and also pop a value >> from the stack and store them deeper down on the stack. > > Sounds like the Intel X87 floating point stack, which we support. GCC does as well. Supporting floating
2006 Mar 28
2
ARM7 decode resource requirements
Hi all I'm looking in to using speex for an ARM7 based speech decode development (note we need the decode only). My hope is that we should be able to run the decoder (in wideband mode) real time on the ARM7 (40MHz) without any problems (the difficulty would be in the encode - but we plan to run that offline on a PC - so we should be OK). Can anyone confirm that this is the case please? Also
2015 Jun 22
3
CentOS on ARM7 (eg Raspberry Pi)
I saw in the anouncement for the upcoming Boston, MA conference that there will be demos of CentOS on an ARM7 system. I am wondering: does this mean that there is somewhere out there a build of some version of CentOS that might run on a Raspberry Pi (which has an ARM7 processor)? -- Robert Heller -- 978-544-6933 Deepwoods Software -- Custom Software Services
2006 Mar 20
1
ARM7 Speex decoder
Dear All I ported the speex decoder in LPC2000 ARM7 family. Because I fetched the .ogg file from and external MMC card, I can only red a limited memory block 1) Can I decode only a block of a speex file at time ? /*Create a new decoder state in narrowband mode*/ state = speex_decoder_init(&speex_nb_mode); /*Set the perceptual enhancement on*/ tmp=1;
2008 Oct 10
0
[LLVMdev] Status of LLVM ARM port
Can you give some examples of missing instructions? Evan On Oct 9, 2008, at 4:58 PM, kapil anand wrote: > I have a question regarding ARM support. It was mentioned in mails > below that LLVM supports ARM v6 but a lot of ARM v6 instructions are > actually missing from ARM ISA description files( e.g. Media > Instructions). Is there any documentation mentioning the unsupported
2008 Jun 19
2
[LLVMdev] Backend for the ZPU - a stack based / zero operand CPU
Hi all, Zylin has implemented the world smallest 32 bit CPU with a GCC backend. (I shall stand corrected if anyone claims & proves otherwise :-) Implementing a GCC backend for a zero operand/stack based architecture proved pretty tricky, but I'm quite pleased with the resulting code. I did make alterations to the architecture to make it fit GCC without sacrificing CPU size. I have been
2007 Aug 24
1
Speex on ARM7
Hello I'm testing SPEEX on embedded board using ARM7 (Atmel). ARM7 don't have floating point so I'm using FIXED_POINT. Unfortunately the encoding speed is about 5 times slower then necessary for real time. ARM7 is slow for 16/8 bits operations. The sequence: static inline spx_word32_t compute_pitch_error(spx_word16_t *C, spx_word16_t *g, spx_word16_t pitch_control) {
2018 Mar 14
1
Does llvm support for the arm7(ARM7EJ-S) (ARMv5TE) properly?
I was trying to using llvm to targeting ARMv5TE -- 此致 礼 罗勇刚 Yours sincerely, Yonggang Luo -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20180314/b9dadc37/attachment.html>
2007 Sep 07
4
Speex and the ARM7 Core
Hello, I'm sorry if this is not the correct place to ask this question but what I'm looking for is any data on the reality of Speex working on an ARM7 core? I'm looking at doing a few diffrent projects where I will be using a proc such as the LPC2378 with the ARM7TDMI-S core running at 72Mhz (although errata show only 60Mhz is currenlty possible). Do you know if there is a port
2005 Jan 19
2
[LLVMdev] Re: LLVM to SUIF-MACH VM binary (Chris Lattner, John Cortes)
Dear friends, I have been using the SUIF Machine infrastructure for sometime. Some optimizations are available without using a target machine, i.e. at the SUIFvm level. At this level you have "infinite" registers. Other optimizations, including analyses as for profiling require the use of a target library, a complete backend. It is very sad, that they have discontinued their MIPS
2008 Oct 10
3
[LLVMdev] Status of LLVM ARM port
Media instructions like - parallel add and subtract, Sign/Zero Extend and Add instructions seem to be missing from ARM target support. These instructions are not listed in GenInstrNames.inc Kapil On Fri, Oct 10, 2008 at 11:54 AM, Evan Cheng <evan.cheng at apple.com> wrote: > > Can you give some examples of missing instructions? > > Evan > > On Oct 9, 2008, at 4:58 PM,