similar to: [PATCH 1/5] hwdefs: update nvc0_3d, add gm107_texture for new TIC format

I believe I've addressed all the feedback from the first time around, and also made fixes necessary for GM20x based on testing results. I believe now it should actually work for all GM10x and GM20x. Further, GP10x should be very easy to add, but without someone to actually test I didn't want to claim support for it. Ilia Mirkin (7): exa: add GM10x acceleration support hwdefs: update

The headers hadn't been regenerated in a long time, and there were a few minor divergences. Among other things, rnndb has changed naming to G80/etc, for now I've not tackled switching that over and manually replaced the nvidia codenames back to the chip ids. However no other modifications of the headergen'd headers was done. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>

Few comments below. On 10/16/2016 09:14 PM, Ilia Mirkin wrote: > This flips GM10x to using the updated format, which is what I tested > with. However GM20x and GP10x also use this TIC format. > > Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> > --- > src/nvc0_accel.c | 11 ++++++++++ > src/nvc0_accel.h | 56 ++++++++++++++++++++++++++++++++++++++++++++++ >

Are you sure this refactoring doesn't break anything? Few comments inline. On 10/27/2016 04:02 PM, Ilia Mirkin wrote: > This flips GM10x to using the updated format, which is what I tested > with. However GM20x and GP10x also use this TIC format. > > Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> > --- > src/nvc0_accel.c | 11 ++++++++++ > src/nvc0_accel.h |

The headers hadn't been regenerated in a long time and had seen a number of manual modifications. A few changes: - remove nvc0_2d entirely, use the nv50 header which has the nvc0 values too - remove 3ddefs, it's identical to the nv50 file - move macros out into a separate file Also the upstream rnndb changed the overall chip naming convention; this was fixed up manually in the

0xc0b5 is not in rnndb, I guess it should be GP100_COPY, right? Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com> On 10/27/2016 04:02 PM, Ilia Mirkin wrote: > Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> > --- > src/nouveau_copy.c | 2 ++ > src/nvc0_accel.c | 10 +++++++++- > 2 files changed, 11 insertions(+), 1 deletion(-) > > diff --git

Based on the original patch by Christoph Bumiller, but since it depends on kernel support patched I cannot push it yet. The changes are that I enable vblank by default, and offset takes OFFSET_HIGH/LOW instead of something relative to notifier_bo. Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com> --- diff --git a/man/nouveau.man b/man/nouveau.man index 7c72907..8765569

From: Ben Skeggs <bskeggs at redhat.com> Signed-off-by: Ben Skeggs <bskeggs at redhat.com> --- src/gallium/drivers/nouveau/nv50/g80_defs.xml.h | 279 ++++++++++++++++++++++++ 1 file changed, 279 insertions(+) create mode 100644 src/gallium/drivers/nouveau/nv50/g80_defs.xml.h diff --git a/src/gallium/drivers/nouveau/nv50/g80_defs.xml.h

rendercheck -f a8r8g8b8 passes as much as on a GK208, and xv appears to work. Very lightly tested. Instead of sticking coordinates into pushbufs, the vertex shader is modified to read them from a constbuf, indexed by vertex id. This approach could be used for all nvc0 generations, but I didn't want to rock the boat. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- Note: this

This flips GM10x to using the updated format, which is what I tested with. However GM20x and GP10x also use this TIC format. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- src/nvc0_accel.c | 11 ++++++++++ src/nvc0_accel.h | 56 ++++++++++++++++++++++++++++++++++++++++++++++ src/nvc0_exa.c | 22 ++++--------------- src/nvc0_xv.c | 67

This flips GM10x to using the updated format, which is what I tested with. However GM20x and GP10x also use this TIC format. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- src/nvc0_accel.c | 11 ++++++++++ src/nvc0_accel.h | 56 ++++++++++++++++++++++++++++++++++++++++++++++ src/nvc0_exa.c | 23 ++++--------------- src/nvc0_xv.c | 67

On Mon, Oct 17, 2016 at 5:46 AM, Samuel Pitoiset <samuel.pitoiset at gmail.com> wrote: > Few comments below. > > On 10/16/2016 09:14 PM, Ilia Mirkin wrote: >> >> This flips GM10x to using the updated format, which is what I tested >> with. However GM20x and GP10x also use this TIC format. >> >> Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>

With this patch the DDX almost works with GK20A, the missing piece is adding COHERENT mappings to the right places. ;-) If you specify NOUVEAU_BO_APER the kernel will truncate valid_domains to the domains specified at creation time. This means that as long as we only specify the correct domain in nouveau_allocate_surface the effect is still the same. Signed-off-by: Maarten Lankhorst <dev at

--- rnndb/nv50_pgraph.xml | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/rnndb/nv50_pgraph.xml b/rnndb/nv50_pgraph.xml index 92d69ea..6499631 100644 --- a/rnndb/nv50_pgraph.xml +++ b/rnndb/nv50_pgraph.xml @@ -93,6 +93,9 @@ <value value="0x23" name="XY_OUT_OF_BOUNDS"> <!-- m2mf at least. 2d too? --> <brief>Your x/y coords

On Fri, Oct 9, 2020 at 5:54 PM Karol Herbst <kherbst at redhat.com> wrote: > > On Fri, Oct 9, 2020 at 11:35 PM Ondrej Zary <linux at zary.sk> wrote: > > > > Hello, > > I'm testing 5.9.0-rc8 and found that Riva TNT2 stopped working: > > [ 0.000000] Linux version 5.9.0-rc8+ (zary at gsql) (gcc (Debian 8.3.0-6) 8.3.0, GNU ld (GNU Binutils for Debian)

So we are currently doing tests and complying with them in our Emulator. Currently the conditional rendering test does not pass (no wonder we not even implement it). I've been looking at the current documentation https://github.com/envytools/envytools/blob/master/rnndb/graph/gf100_3d.xml#L796 So far I don't understand how the cond address is used and to what it's compared.

On Fri, Nov 17, 2017 at 2:37 PM, Ilia Mirkin <imirkin at alum.mit.edu> wrote: > On Fri, Nov 17, 2017 at 2:25 PM, Ondrej Zary <linux at rainbow-software.org> wrote: >> On Friday 17 November 2017 18:41:17 Ilia Mirkin wrote: >>> On Fri, Nov 17, 2017 at 12:33 PM, Ondrej Zary >>> >>> <linux at rainbow-software.org> wrote: >>> > @@ -483,8

https://bugs.freedesktop.org/show_bug.cgi?id=89730 Bug ID: 89730 Summary: NV50: LightDM GTK+ Greeter Background - inconsistent display Product: xorg Version: git Hardware: Other OS: Linux (All) Status: NEW Severity: normal Priority: medium Component: Driver/nouveau

On Thu, Oct 27, 2016 at 1:19 PM, Samuel Pitoiset <samuel.pitoiset at gmail.com> wrote: > Are you sure this refactoring doesn't break anything? > > Few comments inline. > > > On 10/27/2016 04:02 PM, Ilia Mirkin wrote: >> >> This flips GM10x to using the updated format, which is what I tested >> with. However GM20x and GP10x also use this TIC format.

--- rnndb/memory/nvc0_pbfb.xml | 37 ++++++++++++++++++++++++++++++++++--- 1 file changed, 34 insertions(+), 3 deletions(-) diff --git a/rnndb/memory/nvc0_pbfb.xml b/rnndb/memory/nvc0_pbfb.xml index 500cea9..e006dbe 100644 --- a/rnndb/memory/nvc0_pbfb.xml +++ b/rnndb/memory/nvc0_pbfb.xml @@ -49,23 +49,54 @@ Most bitfields are unknown. </doc> <bitfield high="7"