Displaying 20 results from an estimated 2000 matches similar to: "[RFC] Using segmentation to harden SafeStack"
2017 Feb 08
4
[RFC] Using Intel MPX to harden SafeStack
Hi,
I previously posted about using 32-bit X86 segmentation to harden SafeStack: http://lists.llvm.org/pipermail/llvm-dev/2016-May/100346.html That involves lowering the limits of the DS and ES segments that are used for ordinary data accesses while leaving the limit for SS, the stack segment, set to its maximum value. The safe stacks were clustered above the limits of DS and ES. Thus, by
2017 Feb 18
2
[RFC] Using Intel MPX to harden SafeStack
On 2/7/2017 20:02, Kostya Serebryany wrote:
> ...
>
> My understanding is that BNDCU is the cheapest possible instruction,
> just like XOR or ADD,
> so the overhead should be relatively small.
> Still my guesstimate would be >= 5% since stores are very numerous.
> And such overhead will be on top of whatever overhead SafeStack has.
> Do you have any measurements to
2017 Feb 01
2
SafeStack on ARM platform
Hi,
I would like to use SafeStack sanitize option on ARM platform. Since Linux libc does not implement such functionality (in opposite to FreeBSD or Android), I need to use SafeStack compiler RT library. Unfortunately I've noticed that libclang_rt.safestack is not compiled/built for ARM platform. Looking into cmake file:
"set(ALL_SAFESTACK_SUPPORTED_ARCH ${X86} ${X86_64} ${ARM64}
2014 Nov 15
3
[LLVMdev] [PATCH] Protection against stack-based memory corruption errors using SafeStack
Hi Kostya,
>On Wed, Nov 12, 2014 at 2:50 AM, Volodymyr Kuznetsov <vova.kuznetsov at epfl.ch
>> wrote:
>
>> Dear LLVM developers,
>>
>> We've applied the feedback we received on Phabricator on the SafeStack
>> patches,
>>
>
>Did you investigate the possibility of moving the transformation from
>codegen to the LLVM level, i.e. the same level
2014 Nov 17
2
[LLVMdev] [PATCH] Protection against stack-based memory corruption errors using SafeStack
+nlewycky
On Mon, Nov 17, 2014 at 9:36 AM, Volodymyr Kuznetsov <vova.kuznetsov at epfl.ch
> wrote:
> Hi Kostya,
>
> On Sat, Nov 15, 2014 at 1:53 PM, Volodymyr Kuznetsov <
> vova.kuznetsov at epfl.ch> wrote:
> > Do you think moving the pass to lib/Transform/Instrumentation but
> > scheduling it during code generation would make sense ? If so, we'll
>
2015 Jun 23
2
[LLVMdev] SafeStack pass and TLS support
Hi all,
Shouldn't SafeStack pass be executed only if the target has TLS support?
E.g. currently for NVPTX there is no way to implement
`__safestack_unsafe_stack_ptr`.
Any comments?
Thanks,
Samuel
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2018 Dec 29
0
Advice for Porting SafeStack to New Pass Manager
On 12/28/18 10:09 PM, Leonard Chan via llvm-dev wrote:
> Hello,
>
> I'm in the process of creating a pass for the new PM for SafeStack
> which is only available as a part of the legacy PM. The only thing
> bugging me is in regards to the TargetPassConfig analysis. Whereas
> most other passes/analyses I have seen separate the logic between the
> actual pass and anything it
2018 Dec 28
2
Advice for Porting SafeStack to New Pass Manager
Hello,
I'm in the process of creating a pass for the new PM for SafeStack
which is only available as a part of the legacy PM. The only thing
bugging me is in regards to the TargetPassConfig analysis. Whereas
most other passes/analyses I have seen separate the logic between the
actual pass and anything it does to the IRUnits it runs over are in 2
separate classes, TargetPassConfig has them
2014 Nov 03
8
[LLVMdev] [PATCH] Protection against stack-based memory corruption errors using SafeStack
Dear LLVM developers,
Our team has developed an LLVM-based protection mechanism that (i) prevents
control-flow hijack attacks enabled by memory corruption errors and (ii)
has very low performance overhead. We would like to contribute the
implementation to LLVM. We presented this work at the OSDI 2014 conference,
at several software companies, and several US universities. We received
positive
2009 Nov 24
0
[LLVMdev] X86InstrInfo::GetInstSizeInBytes() calculating incorrect size
I'm noticing the X86InstrInfo::GetInstSizeInBytes() function returning
incorrect sizes for some instructions. I looked through the llvm-dev
archives and noticed that a patch was submitted once in April 2009 for
instruction length calculation on amd-64. I'm using Intel Core 2 Duo (64
bit) so maybe there is a similar issue? I don't have another computer I can
test this on to see if
2009 Dec 16
1
[LLVMdev] incorrect x86 instruction size calculation
Hello,
I'm trying to write some backends for LLVM that generate code that complies
with SFI validation rules by re-implementing SFI for the LLVM x86 backend
based on the Google NaCl project.
However, in trying to implement 32-byte code alignment,
X86InstrInfo::GetInstSizeInBytes() is returning incorrect instruction sizes
for certain instructions (that I have seen so far): MOV32mi,
2016 Mar 23
0
[Compiler-rt][SafeStack] Request to merge a patch to 3.8.1
Approved.
On Wed, Mar 23, 2016 at 5:11 AM, Mohit Bhakkad <mohit.bhakkad at gmail.com>
wrote:
> Hi Peter,
>
> Request you to approve the merger of this patch to 3.8.1 branch:
>
> http://reviews.llvm.org/rL262690
>
> Thanks,
> Mohit
>
--
--
Peter
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2014 Nov 04
4
[LLVMdev] [PATCH] Protection against stack-based memory corruption errors using SafeStack
On 4 Nov 2014, at 00:36, Kostya Serebryany <kcc at google.com> wrote:
> You at least increase the memory footprint by doubling the stack sizes.
Not quite. The space overhead is constant for each stack frame - you just need to keep track of the top of two stacks, rather than one. The important overhead is that you reduce locality of reference. You will need a minimum of two cache
2017 Jan 31
1
CFI, Safe-Stack, and -fno-sanitize-trap
Hi,
I am using clang++3.9 to build a simple program with both CFI and safe-stack. I am getting linker errors when combining -fsanitize=safe-stack, -fsanitize=cfi, and -fno-sanitize-trap=all. Combining safe-stack and CFI without -fno-sanitize-trap=all works as expected.
It looks like clang is attempting to link in two compiler-rt libraries, one for ubsan and one for safestack, and this causes
2012 Oct 05
0
[LLVMdev] Distinguish variadic register defines/uses in MCInstrDesc?
Hallo,
I worked on how to handle the distinction between variadic defines and uses
and my current solution is this:
I introduce a new dag item in Instruction called VariadicOperandList, which by
default is undefined. It keeps a marker variable_* and all operands which are
placeholders for variable lists (like 'reglist' on ARM).
I think it's the cleanest solution to keep them in a
[LLVMdev] PSA: Perfectly forwarding thunks can now be expressed in LLVM IR with musttail and varargs
2014 Oct 09
2
[LLVMdev] PSA: Perfectly forwarding thunks can now be expressed in LLVM IR with musttail and varargs
On 8 Oct 2014, at 18:19, Reid Kleckner <rnk at google.com> wrote:
> The one target I know about where varargs are passed differently from normal arguments is aarch64-apple-ios/macosx. After thinking a bit more, I think this forwarding thunk representation works fine even on that target. Typically a forwarding thunk is called indirectly, or at least through a bitcast, so the LLVM IR call
2017 Nov 11
0
Wine release 2.21
The Wine development release 2.21 is now available.
What's new in this release (see below for details):
- Still more metafile support in GdiPlus.
- Indirect draws support in Direct 3D.
- Calling convention fixes on ARM.
- Improved serial port detection on Linux.
- Services fixes on WoW64.
- Better DPI scaling in the Shell Explorer.
- Various bug fixes.
The source is available
2012 Sep 26
2
[LLVMdev] Distinguish variadic register defines/uses in MCInstrDesc?
Am Mittwoch, 26. September 2012, 11:18:20 schrieb Jakob Stoklund Olesen:
> Hi Christoph,
>
> As you noticed, MCInstrDesc doesn't distinguish between variadic uses and
> defs. Since variadic instructions will always require some kind of special
> handling, it doesn't seem worthwhile to make the model more detailed.
I don't see what makes them so different from other
2017 Sep 07
2
RFC: Introduce DW_OP_LLVM_memory to describe variables in memory with dbg.value
On Thu, Sep 7, 2017 at 9:46 AM, David Blaikie <dblaikie at gmail.com> wrote:
> Feels to me like bugs rather than inconsistencies (I'd think of an
> inconsistency as "we do X over here intentionally and Y over here
> intentionally but they're in contradiction to one another")
>
The DBG_VALUE MachineInstr actually already has a way to indicate that the
computed
2012 Sep 26
0
[LLVMdev] Distinguish variadic register defines/uses in MCInstrDesc?
On Sep 24, 2012, at 6:39 PM, Christoph Grenz <christophg+llvm at grenz-bonn.de> wrote:
> Is it possible to extend LLVM to check if 'variable_ops' is in 'ins' and/or
> 'outs' in tablegen, so that MCInstrDesc could provide something like
> hasVariadicDefs() and hasVariadicUses()?
>
> That way handling variadic instructions when disassembling would be