similar to: Better way to define instructions using multiclasses?

Displaying 20 results from an estimated 90 matches similar to: "Better way to define instructions using multiclasses?"

2002 May 22
2
Bug in pexp (PR#1590)
I wonder if something like this has been reported before: > pexp(85:86,0.438) [1] 1 -Inf --please do not edit the information below-- Version: platform = i386-pc-mingw32 arch = i386 os = mingw32 system = i386, mingw32 status = major = 1 minor = 5.0 year = 2002 month = 04 day = 29 language = R Windows NT 4.0 (build 1381) Service Pack 6 Search Path: .GlobalEnv,
2004 Aug 06
1
Compiling Problems with ices
Hi list, I tried to set up icecast and ices on our server and ran into problems compiling ices. I ran ./configure --with-xml-config=/usr/lib where the libxml2-2.4.3 is sitting but got this error : "in ices_config.o undefined ref. to xmlParseFile" I also installed libxml2-2.4.3-devel, so the header files should be in place. I ran ldconfig several times but that didn't change
2004 Aug 06
1
playlist trouble
Hi all, I'm running icecast and use ices to stream mp3's to the server. The user can search a database with english audio files ( it's for schools, so nothing fancy ) and then klick on a play-button ( Anhören ) to stream the selected title . But no matter what file is selected I only get the first entry in the playlist. I use the builtin-playlist-handler. You can test it
2002 Apr 02
2
Trouble with R and cronjobs
I am having problems with trying to run R from a crontab job. I have a c-shell file that calls the R script. I get an error concerning the X11 display (see below). I have included the c-shell file and the output from the crontab job. It appears that my DISPLAY environmental variable is not set. Is that necessary, even when the output of the plot command is to a png file? Can someone tell me how to
2006 Oct 10
0
[LLVMdev] tblgen multiclasses
> Basically, flag operands are a hack used to handle resources that are not > accurately modeled in the scheduler (e.g. condition codes, explicit > register assignments, etc). The basic idea of the flag operand is that > they require the scheduler to keep the "flagged" nodes stuck together in > the output machine instructions. >From an user point of view, flags have
2006 Oct 10
1
[LLVMdev] tblgen multiclasses
> > Basically, flag operands are a hack used to handle resources that > are not > > accurately modeled in the scheduler (e.g. condition codes, explicit > > register assignments, etc). The basic idea of the flag operand is > that > > they require the scheduler to keep the "flagged" nodes stuck > together in > > the output machine instructions. >
2006 Oct 09
2
[LLVMdev] tblgen multiclasses
On Mon, 9 Oct 2006, Roman Levenstein wrote: > But your previous explanations were so good that I implemented in my > backend last week almost the same that you've done now in the > X86InstrSSE.td. I even introduced isCommutable parameter to indicate > this property, just as you did. So, by now integer arithmetic and > general purpose instructions are implemented. I'm working
2006 Oct 09
0
[LLVMdev] tblgen multiclasses
Hi Chris, Thanks for this info. This provides even better and more advanced examples of multiclass usage! But your previous explanations were so good that I implemented in my backend last week almost the same that you've done now in the X86InstrSSE.td. I even introduced isCommutable parameter to indicate this property, just as you did. So, by now integer arithmetic and general purpose
2006 Oct 08
3
[LLVMdev] tblgen multiclasses
For anyone interested, X86InstrSSE.td makes extensive use of multiclasses now if people are looking for examples other than the sparc backend. -Chris -- http://nondot.org/sabre/ http://llvm.org/
2006 Feb 24
1
network-bridge - tg3 - no network
Hi, i have some problems with xen-3.0.1 and the network-bridge script. After ''/etc/init.d/xend start'' or ''/etc/xen/script/network-bridge start'' everything works perfect (as well as the domU''s network) - but only for a few seconds (~20s). After that the network seems to crash - no outgoing or incoming connection possible. I have read a forum
2017 Feb 15
5
Unsigned int displaying as negative
Where does the unsignedSub come from? On 2017-02-15 20:38, Ryan Taylor wrote: > Sorry, it should be: > > defm SUB16u_ : ABD_NonCommutative<"sub16u", unsignedSub, LOADRegs, > GPRRegs, DSTRegs, i16, i16, i16, uimm16, immZExt16x>; > > On Wed, Feb 15, 2017 at 2:37 PM, Ryan Taylor <ryta1203 at gmail.com> > wrote: > >> I see. If I put simm16 and
2011 May 30
0
how to interpret coefficients from multiclass svm using libsvm (for multiclass R-SVM)
Hello all, I'm working with the svm (libsvm) implementation from library(e1071). Currently I'm trying to extend recursive feature elimination (R-SMV) to work with multiclass classification. My problem is that if I run svm for a 3 class problem I get a 2-D vector back from model$coefs, can someone explain me what this values are? I understand them in the 2-class problem where this is a
2007 Sep 13
1
[LLVMdev] Nested multiclass/defm declarations?
Hi list, I'm toying with the idea of writing a m680x0 backend for LLVM, and the address modes of this chip are bewildering, to say the least. Here's a rough list off wikipedia for reference: * Register direct o data register, e.g. "D0" o address register, e.g. "A6" * Register indirect o Simple address, e.g. (A0) o
2009 Feb 10
2
[LLVMdev] Multiclass patterns
Is there a way to define a multi-class pattern in tablegen? Thanks, Micah Villmow Systems Engineer Advanced Technology & Performance Advanced Micro Devices Inc. S1-609 One AMD Place Sunnyvale, CA. 94085 P: 408-749-3966 -------------- next part -------------- An HTML attachment was scrubbed... URL:
2009 Feb 10
0
[LLVMdev] Multiclass patterns
On Mon, Feb 9, 2009 at 5:17 PM, Villmow, Micah <Micah.Villmow at amd.com> wrote: > Is there a way to define a multi-class pattern in tablegen? > Yes. See "multiclass" and "defm" in, say, X86Instr64bit.td, et al. -bw
2009 Mar 24
3
[LLVMdev] Multiclass inheritance?
In TableGen, can multiclasses inherit from one another? I notice that there's a lot of redundancy in the X86 .td files that could go away with multiclass inheritance. -Dave
2009 Mar 24
0
[LLVMdev] Multiclass inheritance?
On Mar 23, 2009, at 5:14 PM, David Greene wrote: > In TableGen, can multiclasses inherit from one another? I notice > that there's > a lot of redundancy in the X86 .td files that could go away with > multiclass > inheritance. Nope, not currently. That would be a nice feature though! -Chris
2012 Nov 14
0
[LLVMdev] TableGen: Requires in multiclass's def as well as defm
Hi, I'd like to disallow ARM's register-register preload instruction for NaCl (and keep the register-immediate), and instead of my localmod being to delete the 'rs' def from multiclass APreLoad I'd like to do the cleaner thing and have rs require IsNotNaCl. This unfortunately doesn't seem to work because the subsequent defm have their own Requires. The way preloads are
2009 Feb 24
0
samr-package: problem with large sample size multiclass data
Dear all, I'm using the samr-package to identify significantly differentially expressed genes in microarray data. So far, I had no problems, but when I used a large multiclass data set with 327 samples, I obtained the following error/warning message: Warning message: Inf In factorial(length(y)) : value out of range in 'gammafn' Since y is the label vector and has length 327, the
2013 Mar 26
0
Error-correcting output code with multiclass problems
Hello, I just wanted to know if there's any package that implements error-correcting output code algorithms for multiclass ensemble problems. thank you in advance.