Displaying 20 results from an estimated 2000 matches similar to: "SCEVExpander bug?"
2017 Aug 09
2
Improving SCEV's behavior around IR level no-wrap
> On Aug 8, 2017, at 5:34 PM, Sanjoy Das <sanjoy at playingwithpointers.com> wrote:
>
> Hi Pankaj,
>
> IIRC there was pushback on this proposal so I did not proceed further.
> Are you blocked on this?
>
> [+CC Andy, who I remember had some objections.]
>
> — Sanjoy
Off the top of my head, my concern is that expression comparison is no longer constant time,
2015 Apr 06
2
[LLVMdev] inconsistent wording in the LangRef regarding "shl nsw"
The LangRef says this for left shifts:
"If the nsw keyword is present, then the shift produces a poison value
if it shifts out any bits that disagree with the resultant sign bit."
... (1)
followed by
"As such, NUW/NSW have the same semantics as they would if the shift
were expressed as a mul instruction with the same nsw/nuw bits in (mul
%op1, (shl 1, %op2))." ... (2)
But
2019 Aug 26
2
missing simplification in ScalarEvolution?
Hi Sanjoy,
Thanks for the reply!
Your approach sounds good to me!
I think 1) is legal as address wraparound in unsigned range doesn't make sense given a positive offset, but I am not sure.
I think umax will not be added if we can prove the predicate as known.
I am not sure whether umax will get simplified if we add nuw to the expressions.
-Pankaj
-----Original Message-----
From: Sanjoy
2019 Aug 21
2
missing simplification in ScalarEvolution?
Thanks for the suggestion but datalayout info did not solve the problem!
-Pankaj
-----Original Message-----
From: Philip Reames <listmail at philipreames.com>
Sent: Tuesday, August 20, 2019 5:26 PM
To: Chawla, Pankaj <pankaj.chawla at intel.com>; llvm-dev at lists.llvm.org
Subject: Re: [llvm-dev] missing simplification in ScalarEvolution?
Try adding a datalayout with pointer size
2018 Apr 06
2
SCEVExpander and IRBuilder
Hello,
I use SCEVExpander and IRBuilder to generate some code and I frequently
end-up breaking dominance because the SCEVExpander insertion point and the
IRBuilder insertion point do not advance in synchrony.
Ideally, I could build a SCEVExpander based on an existing IRBuilder (so
that they move each other). Or even better, SCEVExpander inherit from
IRBuilder and basically extend it with SCEV
2018 Apr 29
0
SCEVExpander and IRBuilder
Hi Alexandre,
Sorry I missed this -- I was on vacation when you sent this.
SCEVExpander already has an IRBuilder in it but AFAICT it isn't
exposed as a public interface. I'd be fine if you wanted to expose a
public `GetIRBuilder()` accessor that let a SCEVExpander client use
the same IRBuilder as SCEVExpander.
-- Sanjoy
On Fri, Apr 6, 2018 at 10:55 AM, Alexandre Isoard via llvm-dev
2016 Mar 24
0
LSR/SCEV problem/question
Hi Geoff,
Firstly, I think it will be great if you have a small reproducer of
this issue (which I can make fail after re-applying D18001 to ToT).
> I’ve run into what appears to be a bug in ScalarEvolution, but I’m not sure
> if it is instead caused by me missing an implicit assumption between LSR and
> SCEV.
>
> This issue is caused by the change D18001, which is an attempt to
2018 May 03
2
SCEVExpander and IRBuilder
Hi Alex, Sanjoy,
exposing the internal IRBuilder to users of SCEVExpander violates
information hiding, and encourages the tight coupling that makes code bases
such as Polly so hard to maintain. SCEVExpander::expandCodeFor returns a
Value that (if it's an instruction) can be used to update the insert point
of the client's IRBuilder. Is that not enough?
No hidden state, no hidden state
2018 May 03
0
SCEVExpander and IRBuilder
Hey,
Alternatively, expose a SCEVExpander::getInsertPoint? This would proxy the
underlying IRbuilder, with no real state sharing, other than the current
insert point.
This will be less ugly than recieving the expanded SCEV value, casting to
an instruction, and feeding this to the IRBuilder.
Cheers,
siddharth
On Thu 3 May, 2018, 15:36 Philip Pfaffe via llvm-dev, <
llvm-dev at
2019 Aug 20
2
missing simplification in ScalarEvolution?
Hi,
I have this small test case-
%struct1 = type { i32, i32 }
@glob_const = internal constant [4 x %struct1] [%struct1 { i32 4, i32 5 }, %struct1 { i32 8, i32 9 }, %struct1 { i32 16, i32 0 }, %struct1 { i32 32, i32 10 }], align 16
define void @foo() {
entry:
br label %loop
loop: ; preds = %loop, %entry
%iv = phi %struct1* [ getelementptr
2017 Aug 08
2
Improving SCEV's behavior around IR level no-wrap
Hi Sanjoy,
Any update on this?
Are there plans to implement this proposal?
Thanks,
Pankaj
-----Original Message-----
Date: Fri, 23 Sep 2016 02:09:19 -0700
From: Sanjoy Das via llvm-dev <llvm-dev at lists.llvm.org>
To: llvm-dev <llvm-dev at lists.llvm.org>, Andrew Trick
<atrick at apple.com>, Dan Gohman <dan433584 at gmail.com>, Hal Finkel
<hfinkel at anl.gov>,
2016 Mar 23
6
LSR/SCEV problem/question
Hi All,
I've run into what appears to be a bug in ScalarEvolution, but I'm not sure
if it is instead caused by me missing an implicit assumption between LSR and
SCEV.
This issue is caused by the change D18001 <http://reviews.llvm.org/D18001> ,
which is an attempt to increase SCEV-inserted instruction re-use by picking
a more canonical insertion position in the case where a new
2016 Aug 17
2
Loop vectorization with the loop containing bitcast
Hi ,
The following loop fails to be vectorized since the load c[i] is casted as i64 and the store c[i] is double. The loop access analysis gives up since they are in different types.
Since these two memory operations are in the same size, I believe the loop access analysis should return forward dependence and thus the loop can be vectorized.
Any comments?
Thanks,
Jin
#define N 1000
double
2016 Oct 17
2
[SCEV] inconsistent operand ordering
Hi,
I noticed an inconsistency in how ScalarEvolution orders instruction operands. This inconsistency can result in creation of separate (%a * %b) and (%b * %a) SCEVs as demonstrated by the example IR below (attached as gep-phi.ll)-
target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
define void @foo(i8* nocapture %arr, i32 %n, i32* %A, i32* %B) local_unnamed_addr {
2016 Jun 02
6
-Wmisleading-indentation violations
Hi,
I was building LLVM with gcc 6.1.1 recently and it was spitting out
some warnings relating to misleading indention that caught my eye.
This wasn't a fresh build so I may have missed some. I've CC'ed the
authors of the potentially misleading lines so they can decide what do
about the warnings (if anything).
I'm wondering if clang-format is making some inappropriate choices
2015 Jun 26
6
[LLVMdev] Deriving undefined behavior from nsw/inbounds/poison for scalar evolution
*** Summary
I'd like to propose (and implement) functionality in LLVM to determine when
a poison value from an instruction is guaranteed to produce undefined
behavior. I want to use that to improve handling of nsw, inbounds etc.
flags in scalar evolution and LSR. I imagine that there would be other uses
for it. I'd like feedback on this idea before I proceed with it.
*** Details
Poison
2013 Oct 03
4
[LLVMdev] ScalarEvolution::createNodeForPHI
On 10/03/2013 01:22 AM, Andrew Trick wrote:
>
> I’m not sure how to make sense of an NUW flag coming from a sub.
>
> NSW is just a misnomer for signed overflow. SCEV canonicalizes sub a,b to add a, (-b). Unfortunately, signed overflow is not the same thing for sub and add...
>
> sub nsw %a, %b != add nsw %a, (-1 * %b)
>
> sub nsw i32, -1, INT_MIN is true.
>
> add
2019 May 31
2
Commit 93af05e03e05d2f85b5a7e20ec3a3a543584d84f causes warning
Generally it is preferable to store bitfields using plain integer types
because MSVC has surprising behavior when packing bitfields of differing
type. MSVC, for example, will not back this into one byte:
bool a : 1;
uint8_t b : 2;
bool c : 1;
So, for LLVM or any other cross platform project, I recommend storing enums
as some integer type, using the same type for all bitfields, and adding
2013 Oct 03
0
[LLVMdev] ScalarEvolution::createNodeForPHI
On 10/03/2013 04:15 PM, Michele Scandale wrote:
> On 10/03/2013 01:22 AM, Andrew Trick wrote:
>>
>> I’m not sure how to make sense of an NUW flag coming from a sub.
>>
>> NSW is just a misnomer for signed overflow. SCEV canonicalizes sub a,b to add a, (-b). Unfortunately, signed overflow is not the same thing for sub and add...
>>
>> sub nsw %a, %b != add nsw
2019 May 31
2
Commit 93af05e03e05d2f85b5a7e20ec3a3a543584d84f causes warning
Hello,
After commit 93af05e03e05d2f85b5a7e20ec3a3a543584d84f we have new warning but only if compiled with GCC:
In file included from /path/to/llvm/include/llvm/ExecutionEngine/Orc/ExecutionUtils.h:19:0,
from /path/to/llvm/lib/ExecutionEngine/Orc/OrcMCJITReplacement.h:23,
from /path/to/llvm/lib/ExecutionEngine/Orc/OrcMCJITReplacement.cpp:9: