similar to: proposal for optimization method

Hi, On ARMv6T2 this turns cttz into rbit, clz instead of the 4 instruction sequence it is now. I'm not sure if adding RBIT to ARMISD and doing this optimization in the legalize pass is the best option, but the only better way I could think of doing it was to add a bitreverse intrinsic to llvm ir, which itself might not be the best option since bitreverse probably isn't too common. Other

On 15 Jan 2010, at 18:03, Chris Lattner wrote: > On Jan 14, 2010, at 10:13 PM, David Conrad wrote: > >> Other targets that I know of that could potentially benefit from >> this optimization being global (that have a clz and bitreverse >> instruction but not ctz) are AVR32 and C64x, neither of which llvm >> has backends for yet. > > When/if another

On Jan 14, 2010, at 10:13 PM, David Conrad wrote: > Hi, > > On ARMv6T2 this turns cttz into rbit, clz instead of the 4 > instruction sequence it is now. > > I'm not sure if adding RBIT to ARMISD and doing this optimization in > the legalize pass is the best option, but the only better way I > could think of doing it was to add a bitreverse intrinsic to llvm

Hi all, Greetings. I'm a Ph.D. student in UIUC. Now I'm working on SAFECode, a research compiler based on LLVM which insert necessary runtime checks to guarantee memory-safety of programs. SAFECode needs to insert checks into the programs (say, please check this load instruction for me). Currently SAFECode inserts these checks as normal call instructions. It would be great that LLVM can

On Jan 15, 2010, at 11:37 AM, Richard Osborne wrote: > > On 15 Jan 2010, at 18:03, Chris Lattner wrote: > >> On Jan 14, 2010, at 10:13 PM, David Conrad wrote: >> >>> Other targets that I know of that could potentially benefit from >>> this optimization being global (that have a clz and bitreverse >>> instruction but not ctz) are AVR32 and C64x,

On Jan 15, 2010, at 2:52 PM, Jim Grosbach wrote: > > On Jan 15, 2010, at 11:37 AM, Richard Osborne wrote: > >> >> On 15 Jan 2010, at 18:03, Chris Lattner wrote: >> >>> On Jan 14, 2010, at 10:13 PM, David Conrad wrote: >>> >>>> Other targets that I know of that could potentially benefit from >>>> this optimization being

On Jun 12, 2009, at 2:52 PM, Mai, Haohui wrote: > Greetings. I'm a Ph.D. student in UIUC. Now I'm working on SAFECode, a > research compiler based on LLVM which insert necessary runtime checks > to guarantee memory-safety of programs. SAFECode needs to insert > checks > into the programs (say, please check this load instruction for me). Hi. > Currently SAFECode

On Fri, Jan 15, 2010 at 6:03 PM, Chris Lattner <clattner at apple.com> wrote: > > On Jan 14, 2010, at 10:13 PM, David Conrad wrote: > >> Hi, >> >> On ARMv6T2 this turns cttz into rbit, clz instead of the 4 >> instruction sequence it is now. >> >> I'm not sure if adding RBIT to ARMISD and doing this optimization in >> the legalize pass is

On Jun 9, 2009, at 1:16 PM, Manjunath Kudlur wrote: >> All of the tablegen backends work this way. As you mentioned, >> >> there are no target-specific tablegen backends at present. >> >> >> >> The underlying observation here is that features are never >> >> fundamentally "specific for a target". For example, a mapping >>

LLVM Weekly - #1, Jan 6th 2014 ============================== Welcome to the inaugural issue of LLVM Weekly, a weekly newsletter (published every Monday) covering developments in LLVM, Clang, and related projects. I've been a long time lurker on the LLVM and Clang mailing lists and have been using LLVM extensively in my PhD research for the past 4 years. I thought it might be worthwhile to

> All of the tablegen backends work this way. As you mentioned, > there are no target-specific tablegen backends at present. > > The underlying observation here is that features are never > fundamentally "specific for a target". For example, a mapping > between vector opcodes and associated scalar opcodes could > reasonably be made on many architectures. Even >

I'm trying to reason about how to find certain bit positions of the absolute value of a given integer value. Specifically, I want to know the highest possibly set bit and lowest possibly set bit of the absolute value, in order to find the range between the two. Note that I'm specifically trying to be as conservative as possible. This is what I have so far: If the sign bit of the

Hi Tim, Thanks for your reply. On Mon, Nov 10, 2014 at 1:26 PM, Tim Northover <t.p.northover at gmail.com> wrote: > Hi Ray, > > On 10 November 2014 10:13, Alex S <alexmountain13 at gmail.com> wrote: > > Sorry for bothering those not interested. I found that ARM backend will > > insert a modulo function > > (like __modsi3) instead of the modulo instruction.

Hello, I am hoping that perhaps you know the answer to my car audio question, or can at least point me in the right direction. I own a 2013 Audi S4 that has the 3G-Plus Multi Media Interface (MMI) with the Bang & Olufsen Sound System. The MMI is able to playback lossy, compressed audio files (MP3, WMA and AAC), but does not have native support for FLAC, ALAC, or WMA Lossless.

On Wed, May 10, 2017 at 4:45 AM, elio manes <elioarmando at optonline.net> wrote: > Hello, > > > I am hoping that perhaps you know the answer to my car audio question, or > can at least point me in the right direction. I own a 2013 Audi S4 that > has the 3G-Plus Multi Media Interface (MMI) with the Bang & Olufsen Sound > System. > > > The MMI is able to

I am trying to compare Vbert growth curves from several years of fish data. I am following the code provided by: http://www.ncfaculty.net/dogle/fishR/gnrlex/VonBertalanffy/VonBertalanffy.pdf. Specifically the section on VBGM Comparisons between groups. ? This code is pretty cut and dry. I am able to run it perfectly with the "fake" data that is provided. But when I run it with my own

Hi we have something like an external driver that likes to own MCInst data externally, i.e. outside from LLVM. By default, the MachineModuleInfo/WrapperPass creates its own context in the constructor of MachineModuleInfo. MMI's context is used throughout codegen. When using a MCStreamer with an external context one can achieve almost what we want, because the streamer's context is used to

Looks sane. Thanks. Evan On Feb 1, 2008, at 1:24 AM, Nicolas Geoffray wrote: > Dear all, > > Here's a new patch with Evan's comments (thx Evan!) and some cleanups. > Now the (duplicated) exception handling code is in a new file: > lib/ExecutionEngine/JIT/JITDwarfEmitter. > > This patch should work on linux/x86 and linux/ppc (tested). > > Nicolas > Index:

Dear all, Here's a new patch with Evan's comments (thx Evan!) and some cleanups. Now the (duplicated) exception handling code is in a new file: lib/ExecutionEngine/JIT/JITDwarfEmitter. This patch should work on linux/x86 and linux/ppc (tested). Nicolas -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: jit-exceptions.patch URL:

On Dec 10, 2007, at 9:52 AM, Nicolas Geoffray wrote: > Hi everyone, > > Here's a patch that enables exception handling when jitting. I've > copy/pasted _many_code from lib/Codegen/DwarfWriter.cpp, so we may > need > to factorize it, but the functionality is there and I'm very happy > with > it :) Very nice! I don't know enough about EH, someone else