Displaying 20 results from an estimated 400 matches similar to: "LLVM Pass for Instructions in Function (error"
2016 Nov 28
2
LLVM Pass for Instructions in Function (error
> On Nov 27, 2016, at 6:40 PM, Gurunath Kadam via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>
> Hi Sandeep,
>
> Thanks.
>
> One question about:
>
> Value* AddrPointer = Inst->getIperand(0);
>
> So this works for LVALUE(S) i.e. in my case pointer on LHS of '='. I cannot find anything online about getloperand online.
>
> For reference
2019 May 25
3
llvm pass
Hi list,
I have several questions about LLVM pass.
1) Is building a custom LLVM pass out-of-source not recommended?
The official document only contains instructions about in-source build (http://llvm.org/docs/WritingAnLLVMPass.html <http://llvm.org/docs/WritingAnLLVMPass.html>).
2) opt (ver >= 4) with custom pass libraries does not work as before. When I have a simple custom LLVM pass
2017 May 24
3
GraphTraits dereferencing
Hello,
I’m trying to port a project up to 4.0 and I’m seeing the following error:
In file included from /Users/jaredcarlson/Projects/llvm-4.0.0.src/include/llvm/ADT/StringRef.h:13:
/Users/jaredcarlson/Projects/llvm-4.0.0.src/include/llvm/ADT/STLExtras.h:139:13: error: no type named 'type' in 'std::__1::result_of<std::__1::pointer_to_unary_function<llvm::DSNode *, llvm::DSNode
2017 Jun 09
2
Get segfault with ModulePass
Hi,
don't know if this is the right list. Please post a better place,
otherwise.
I'm currently writing a LLVM ModulePass and ran into strange segfaults or
endless loops within LLVM. My main question is, if this is a programming error
or API misuse from me or a LLVM bug?
Here is some minimal code, that triggers the bug:
----------------
class DebugPass : public ModulePass {
public:
2016 Oct 14
2
LLVM/CLANG: CUDA compilation fail for inline assembly code
Hi,
I am sorry for sending this query again here, but maybe I sent it to wrong
list yesterday.
I am trying to compile LonestarGPU-rev2.0
<http://iss.ices.utexas.edu/?p=projects/galois/lonestargpu/download>
benchmark suite with LLVM/CLANG.
This suite has a following piece of code (more info here
2016 Dec 21
0
llvm/cuda: Indentify kernel functions and optimizations
https://github.com/llvm-mirror/llvm/blob/652375a8cc49615de31fd9d424753795059185b6/lib/Target/NVPTX/NVPTXUtilities.h#L58
Does this solve your problem?
On Wed, Dec 21, 2016 at 2:29 PM, Gurunath Kadam via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> Hi,
>
> I am trying to instrument CUDA kernel functions only (llvm-3.9.0).
>
> Is there a way to identify cuda kernel
2019 Jul 12
2
[cfe-dev] ARM float16 intrinsic test
Hi,
I do not get your result. Do I miss something?
$COMP_ROOT/clang++ --target=arm-arm-eabihf -march=armv8.2a+fp16
arm.cpp -S -o - -O3
.text
.syntax unified
.eabi_attribute 67, "2.09"
.eabi_attribute 6, 14
.eabi_attribute 7, 65
.eabi_attribute 8, 1
.eabi_attribute 9, 2
.fpu crypto-neon-fp-armv8
.eabi_attribute 12, 4
2019 Jul 12
2
[cfe-dev] ARM float16 intrinsic test
Dear list,
git checkout llvmorg-8.0.0 -b llvm8.0
cmake -G "Unix Makefiles" ../llvm-project/llvm -DCMAKE_BUILD_TYPE=Debug
-DLLVM_ENABLE_PROJECTS="clang;lld"
-DLLVM_TARGETS_TO_BUILD="X86;NVPTX;AMDGPU;ARM;AArch64"
[arm.cpp]
#define vst4_lane_f16(__p0, __p1, __p2) __extension__ ({ \
float16x4x4_t __s1 = __p1; \
__builtin_neon_vst4_lane_v(__p0, __s1.val[0],
2016 Dec 21
2
llvm/cuda: Indentify kernel functions and optimizations
Hi,
I am trying to instrument CUDA kernel functions only (llvm-3.9.0).
Is there a way to identify cuda kernel functions?
I see that in llvm IR for CUDA has nvvm annotations section, where kernel
functions are identified for NVPTX usage. I can parse the whole IR for this
kernel metadata and then proceed, but this is very clumsy.
Other way is to work with cuda-device-only IR. But then I am not
2016 Dec 23
0
Assign different RegClasses to a virtual, register based on 'uniform' attribute?
On 2016年12月22日 15:37, via llvm-dev wrote:
> Send llvm-dev mailing list submissions to
> llvm-dev at lists.llvm.org
>
> To subscribe or unsubscribe via the World Wide Web, visit
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> or, via email, send a message with subject or body 'help' to
> llvm-dev-request at lists.llvm.org
>
> You can reach the
2018 Dec 12
3
LLVM Alias Analysis
Dear LLVM Developers,
My name is Artem Vopilov, I am a student at TU Darmstadt. I am writing to you to ask about Alias Analysis.
I am using llvm to analyze alias between variables in programs. I am using Alias Analysis implemented in llvm with command "opt -analyze -aa-eval -print-all-alias-modref-info" and for printing sets of alias "opt -analyze -aa-eval -print-alias-sets".
2018 Dec 14
3
LLVM Alias Analysis problem
Dear LLVM developers,
My name is Artem Vopilov, I am a student at TU Darmstadt. I am writing to you again to ask about Alias Analysis.
Now I attached IR code and C code of program I analyze with Alias Analysis.
Running commands "opt -analyze -aa-eval -print-all-alias-modref-info" and for printing sets of alias "opt -analyze -aa-eval -print-alias-sets" gives me the results,
2016 Nov 24
2
Running "different tests" on cmake based test-suite build
On 11/24/16 3:12 AM, Arnaud De Grandmaison via llvm-dev wrote:
>
> Hi Sandeep,
>
> The CMake version of the test-suite has been improved (see
> https://reviews.llvm.org/D21360) so that it’s easy to plug additional
> test suites. A starting point would be to look at how the
> TEST_SUITE_SUBDIRS variable in the top level CMakeLists.txt is used.
>
I think this bug report
2018 Dec 14
2
LLVM Alias Analysis problem
> On 14 Dec 2018, at 16:58, Doerfert, Johannes Rudolf via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>
> Hi Artem,
>
> 1) Please do not CC all the llvm lists you can find. llvm-dev is the one
> for questions like this one, llvm-admin, mailman, bugs-admin, ... are
> not.
>
> 2) Please attach the _full_ LLVM-IR you used, the ".txt" file you
>
2008 Jul 08
3
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
Hi Evan,
Evan Cheng wrote:
> The patch looks great. But I do have one comment:
>
> +let usesCustomDAGSchedInserter = 1 in {
> + let Uses = [CR0] in {
> + let Uses = [R0] in
> + def ATOMIC_LOAD_ADD_I32 : Pseudo<
>
> The "let Uses = [R0]" is not needed. The pseudo instruction will be
> expanded like this later:
>
> + BuildMI(BB,
2008 Jul 08
0
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
Look for createVirtualRegister. These are examples in
PPCISelLowering.cpp.
Evan
On Jul 8, 2008, at 8:24 AM, Gary Benson wrote:
> Hi Evan,
>
> Evan Cheng wrote:
>> The patch looks great. But I do have one comment:
>>
>> +let usesCustomDAGSchedInserter = 1 in {
>> + let Uses = [CR0] in {
>> + let Uses = [R0] in
>> + def ATOMIC_LOAD_ADD_I32 :
2016 Nov 24
2
Running "different tests" on cmake based test-suite build
Hello Friends,
With configure based build deprecated on llvm, how can I run different
tests/pass on the suite
(http://llvm.org/docs/TestSuiteMakefileGuide.html#running-different-tests)?
Right now I am having a hacky solution, which includes running the
"still present" configure file of test-suite to generate the
MAKE.<MYPASS>.Makefile;
> cd external-testsuite-build-loc
2017 Jun 11
2
Get segfault with ModulePass
Hi,
thanks for the answer.
Am Sonntag, 11. Juni 2017, 02:16:36 CEST schrieben Sie:
> Have you tried building LLVM with assertions enabled? Assertions are
> often a good way to catch API misuses, but they aren't on by default
> for release builds.
Good advice. You're right. Now an assertion triggers. The problem
seems to be the argument iterator.
Do you know some way to
2008 Jul 08
2
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
Would it be acceptable to change MachineInstr::getRegInfo from private
to public so I can use it from PPCTargetLowering::EmitInstrWithCustomInserter?
Cheers,
Gary
Evan Cheng wrote:
> Look for createVirtualRegister. These are examples in
> PPCISelLowering.cpp.
>
> Evan
> On Jul 8, 2008, at 8:24 AM, Gary Benson wrote:
>
> > Hi Evan,
> >
> > Evan Cheng wrote:
2008 Jul 08
0
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
PPCTargetLowering::EmitInstrWithCustomInserter has a reference
to the current MachineFunction for other purposes. Can you use
MachineFunction::getRegInfo instead?
Dan
On Jul 8, 2008, at 1:56 PM, Gary Benson wrote:
> Would it be acceptable to change MachineInstr::getRegInfo from private
> to public so I can use it from
> PPCTargetLowering::EmitInstrWithCustomInserter?
>
>