Displaying 20 results from an estimated 1000 matches similar to: "How to remove memcpy"
2016 Oct 15
5
How to remove memcpy
On Sat, Oct 15, 2016 at 04:01:36PM -0700, Mehdi Amini via llvm-dev wrote:
>
> > On Oct 15, 2016, at 3:56 PM, Wolfgang McSneed via llvm-dev <llvm-dev at lists.llvm.org> wrote:
> >
> > Hi,
> >
> > I am hoping that someone can help me figure out how to prevent the insertion of "memcpy" from the assembly source.
> >
> > My target is an
2013 Feb 20
0
[LLVMdev] Is va_arg correct on Mips backend?
Does it make a difference if you give the "-target" option to clang?
$ clang -target mips-linux-gnu ch8_3.cpp -o ch8_3.bc -emit-llvm -c
The .s file generated this way looks quite different from the one in your
email.
On Tue, Feb 19, 2013 at 5:06 PM, Jonathan <gamma_chen at yahoo.com.tw> wrote:
> I didn't have Mips board. I compile as the commands and check the asm
>
2013 Feb 20
3
[LLVMdev] Is va_arg correct on Mips backend?
I didn't have Mips board. I compile as the commands and check the asm output as below.
1. Question:
The distance of caller arg[4] and arg[5] is 4 bytes. But the the callee get every
arg[] by 8 bytes offset (arg_ptr1+8 or arg_ptr2+8). I assume the #BB#4 and #BB#5 are the arg_ptr which is the pointer to access the stack arguments.
2. Question:
Stack memory 28($sp) has no initial value. If
2013 Sep 02
0
[LLVMdev] .globl
Hi Reed,
Still catching up on email, so hope this isn't already covered...
reed kotler <rkotler at mips.com> writes:
> I have a strange issue that I encountered with mips16 hard float.
>
> Part of mips16 hard float is to emit calls to runtime routines with the
> same signature as usual soft float routines, except that they are
> implemented using mips32 code which uses
2013 Feb 04
2
[LLVMdev] Problem with PTX assembly printing (NVPTX backend)
Hi,
> Can you post the llc command line you're using? Can you post an LLVM IR
> file that causes this behavior?
yes:
${LLVM_PATH}/bin/llc -o helloworld.s -march=nvptx helloworld.ll
where LLVM_PATH my local installation path for LLVM.
Also attaching helloworld.c:
#include <stdio.h>
int main(void) {
printf("Hello World!\n");
return 0;
}
and helloworld.ll:
2013 Feb 04
0
[LLVMdev] Problem with PTX assembly printing (NVPTX backend)
Alright, couple of points here:
1. Address space 0 is invalid for global variables. This is causing a
crash in llc where we use llvm_unreachable() on this case. This is most
likely why you're seeing llc run forever. The fix for this is to use
address space 1 for globals, which puts them into PTX global memory. On
our side, we should provide a meaningful error message in this case.
2. The
2013 Feb 19
0
[LLVMdev] Is va_arg correct on Mips backend?
Which part of the generated code do you think is not correct? Could you be
more specific?
I compiled this program with clang and ran it on a mips board. It returns
the expected result (21).
On Tue, Feb 19, 2013 at 4:15 AM, Jonathan <gamma_chen at yahoo.com.tw> wrote:
> I check the Mips backend for the following C code fragment compile result.
> It seems not correct. Is it my
2013 Feb 19
2
[LLVMdev] Is va_arg correct on Mips backend?
I check the Mips backend for the following C code fragment compile result. It seems not correct. Is it my misunderstand or it's a bug.
//ch8_3.cpp
#include <stdarg.h>
int sum_i(int amount, ...)
{
int i = 0;
int val = 0;
int sum = 0;
va_list vl;
va_start(vl, amount);
for (i = 0; i < amount; i++)
{
val = va_arg(vl, int);
sum += val;
}
va_end(vl);
2013 Aug 29
2
[LLVMdev] .globl
I need to be able to emit .globl for the soft float routines used by mips16.
The routines are called but there is no .globl definition for them.
How can I do this?
Background:
I have a strange issue that I encountered with mips16 hard float.
Part of mips16 hard float is to emit calls to runtime routines with the
same signature as usual soft float routines, except that they are
implemented
2016 Oct 15
2
How to remove memcpy
On Sat, Oct 15, 2016 at 06:10:05PM -0500, Wolfgang McSneed wrote:
> Thanks for your fast response! attached is the matrix_float.c file.
Are you intentionally not using static (& const) arrays? The compiler has
to use a copy to initialize a & b, given the size, it will use a memcpy
from a read-only section for that.
Joerg
2016 Oct 15
2
How to remove memcpy
Even with -ffreestanding LLVM generates memcpy/memset? Does this mean some
passes do not honor this flag? If you really wanted to prevent libcalls,
you could technically translate those memcpy/memset to loops in lowering.
Kevin
On Sat, Oct 15, 2016 at 4:10 PM, Wolfgang McSneed via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> Hi Mehdi and Joerg,
>
> Thanks for your fast
2019 Jan 18
0
[klibc:master] mips/mips64: simplify crt0 code
Commit-ID: 59f3f33338f371b3a30163406fbb5fe323503939
Gitweb: http://git.kernel.org/?p=libs/klibc/klibc.git;a=commit;h=59f3f33338f371b3a30163406fbb5fe323503939
Author: James Cowgill <james.cowgill at mips.com>
AuthorDate: Fri, 2 Mar 2018 08:33:02 -0800
Committer: Ben Hutchings <ben at decadent.org.uk>
CommitDate: Wed, 2 Jan 2019 03:08:04 +0000
[klibc] mips/mips64: simplify
2013 Feb 27
2
[LLVMdev] Mips backend 3.2 va_arg possible bug
i have this code
typedef long long L;
typedef integer I;
void test2(auto L p0, auto L p1, auto L p2, auto L p4, ...)
{
va_list select;
va_start (select, p4);
report( va_arg(select,L) );
report( va_arg(select,I) );
report( va_arg(select,L) );
2013 Feb 04
0
[LLVMdev] Problem with PTX assembly printing (NVPTX backend)
On Mon, Feb 4, 2013 at 1:09 PM, <nkavv at physics.auth.gr> wrote:
> Hi Justin,
>
>
> Has anyone had similar problems with the NVPTX backend? Shouldn't this
>>> code be linked to the AsmPrinter library for NVPTX (already)?
>>>
>>
>> What do you mean by "doesn't work"? The AsmPrinter library really houses
>> the MCInst
2013 Oct 03
1
[LLVMdev] Help with a Microblaze code generation problem.
Sorry if this is a duplicate: I tried to send it last night and it
didn't go through. I'm trimming some text to see if it helps.
I have a simple program that fails on the Microblaze:
int main()
{
unsigned long long x, y;
x = 100;
y = 0x8000000000000000ULL;
return !(x > y);
}
As you can see, the test case compares two unsigned long long values. To
try to track
2013 Feb 04
3
[LLVMdev] Problem with PTX assembly printing (NVPTX backend)
Hi Justin,
>> Has anyone had similar problems with the NVPTX backend? Shouldn't this
>> code be linked to the AsmPrinter library for NVPTX (already)?
>
> What do you mean by "doesn't work"? The AsmPrinter library really houses
> the MCInst printer, which isn't implemented for NVPTX yet. The older
> assembly printer works just fine. This is
2011 Nov 11
4
[LLVMdev] How to get MIPS from clang + llvm ?
I was told that I can use clang + llvm to get MIPS instructions on my x86 machine.
I did following command and got error below. Does anyone have any idea ? or can someone suggest me how to get MIPS instructions easily from llvm.
clang -ccc-host-triple mips-unknown-linux -ccc-clang-archs mips helllo.c
clang: warning: unknown platform, assuming -mfloat-abi=soft
'+' is not a recognized
2012 Nov 11
2
[LLVMdev] Tracing nodes in selectionDAG to final code...
Hello everyone.
I use this command
clang -emit-llvm hello.c -c -o hello.bc
llc hello.bc -march=mipsel -relocation-model=static -o hello.s
to produce this MIPS code:
.section .mdebug.abi32
.previous
.file "hello.bc"
.text
.globl main
.align 2
.type main, at function
.set nomips16 # @main
.ent main
main:
.cfi_startproc
.frame $sp,32,$ra
.mask 0x80000000,-4
.fmask
2007 Jul 12
1
[LLVMdev] backend problem with LiveInterval::removeRange
Hi all,
When compiling some programs using the Mips backend
i'm getting this assert message on lib/CodeGen/LiveInterval.cpp:227:
"Range is not entirely in interval!"
I don't know yet if it's something that is missing on the backend code or
why
the range to be removed it outside the interval, does anyone have any clue?
A more detailed output is attached.
The program i tried
2012 Mar 22
2
[LLVMdev] Sorting relocation entries
Hi Jim,
Yes, the relocation entries have to be reordered so that the
got16/lo16 or hi16/lo16 pairs appear consecutively in the relocation
table. As a result, relocations can appear in a different order than
the instructions that they're for.
For example, in this code, the post-RA scheduler inserts an
instruction with relocation %got(body_ok) between %got(scope_top) and
%lo(scope_top).
$ cat