similar to: Inconsistency in -march option between llc and clang

Displaying 20 results from an estimated 1000 matches similar to: "Inconsistency in -march option between llc and clang"

2016 May 18
2
LLVM issuse:AArch64 TargetParser
Hi, A64 versus A32/T32 code generation is controlled by the -target option which I don’t believe is under discussion here. James On 18 May 2016, at 13:17, Bruce Hoult <bruce at hoult.org<mailto:bruce at hoult.org>> wrote: Note that armv8a modifies the A32 and T32 instruction sets, and is therefore an important -march option for 32 bit code. Therefore armv8a can not be used to imply
2016 May 05
2
LLVM issuse:AArch64 TargetParser
On 5 May 2016 at 13:01, Bradley Smith <Bradley.Smith at arm.com> wrote: > Allowing -march=aarch64/arm64 is somewhat misleading I think, -march is used > for specifying an architecture version to target whereas aarch64/arm64 don’t > convey any information to that effect, does it mean armv8a, armv8.1-a, etc? Hi Bradley, That's a good point. But also, what does "armv8a"
2017 May 08
4
Reducing code size of Position Independent Executables (PIE) by shrinking the size of dynamic relocations section
+llvm-dev Discussion here: https://sourceware.org/ml/gnu-gabi/2017-q2/msg00000.html On Tue, May 2, 2017 at 10:17 AM, Suprateeka R Hegde <hegdesmailbox at gmail.com> wrote: > On 02-May-2017 12:05 AM, Florian Weimer wrote: >> On 05/01/2017 08:28 PM, Suprateeka R Hegde wrote: >>> So the ratio shows ~96% is RELATIVE reloc. And only ~4% others. This is >>> not the
2016 May 05
4
LLVM issuse:AArch64 TargetParser
Hi everyone, I'm a member engineer of linaro's llvm team,coming from Spreadtrum.I am a new person on LLVM.Now I'm writing a Target Parser for AArch64,so options parsing of AArch64 about cpu & arch & fpu can be summary to one place. In the TargetParser,we assume "aarch64" and "arm64" are synonyms of armv8a(as they are only for armv8a,people usually do
2017 Jun 01
3
[RFC] Making -mcpu=generic the default for ARM armv7a and arm8a rather than -mcpu=cortex-a8 or -mcpu=cortex-a53
Thanks for everyone giving their feedback! I saw pretty unanimous support for making -mcpu=generic the default and making -mcpu=generic schedule for an in-order CPU (Cortex-A8 in this case). I'll be making those changes shortly. I think the comments also make clear that it's less obvious whether we'd want -mcpu=native to become a default. It's probably good for some use cases, but
2015 Jul 16
2
[LLVMdev] Validating a new release
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2017 May 31
6
[RFC] Making -mcpu=generic the default for ARM armv7a and arm8a rather than -mcpu=cortex-a8 or -mcpu=cortex-a53
Motivation At the moment, when targeting armv7a, clang defaults to generate code as if -mcpu=cortex-a8 was specified. When targeting armv8a, it defaults to generate code as if -mcpu=cortex-a53 was specified. This leads to surprising code generation, by the compiler optimizing for a specific micro-architecture, whereas the intent from the user was probably to generate code that is
2017 Dec 07
0
Reducing code size of Position Independent Executables (PIE) by shrinking the size of dynamic relocations section
Sri and I have been working on this over the past few months, and we've made some good progress that we'd like to share and get feedback on. Our work is based on the 'experimental-relr' prototype from Cary that is available at 'users/ccoutant/experimental-relr' branch in the binutils repository [1], and was described earlier in this thread:
2016 May 09
2
LLVM issuse:AArch64 TargetParser
Hi all, Actually,I found there is a same problem for arm.For this case,I think > maybe we can play a trick in the clang. > Checking whether the given arch valid or not,before we throw it to the > parser,which can be used for both arm > and aarch64. For the actions I mentioned above,I wrote a check function as below, basing on the naming rules of the arm architecture. +//Only if
2015 Jul 17
7
[LLVMdev] how to transform elf binary to llvm IR?
I want to transform elf binary to llvm IR, and do some instrumentation based on llvm. Is there any tool which can do the transformation? Thanks in advance. - mudongliang -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150717/abee5f23/attachment.html>
2014 Dec 18
2
[LLVMdev] [Compiler-rt] -march=aarch64 flag in gcc/clang
Hi, Right. I'm aware of that. But to Clang, "armv8-a" as an architecture is ARMv8/AArch32. Unless Clang has recently got a lot cleverer than it has been in the past. James On Thu Dec 18 2014 at 9:06:04 AM Christophe Lyon <christophe.lyon at linaro.org> wrote: > On 18 December 2014 at 09:07, James Molloy <james at jamesmolloy.co.uk> > wrote: > > Hi Renato,
2014 Dec 18
2
[LLVMdev] [Compiler-rt] -march=aarch64 flag in gcc/clang
Hi Renato, Are you sure? Armv8-a is aarch32, not aarch64. Something smells fishy there. Cheers, James On Thu, 18 Dec 2014 at 08:03, Renato Golin <renato.golin at linaro.org> wrote: > On 16 December 2014 at 20:29, Christophe Lyon > <christophe.lyon at linaro.org> wrote: > >> I don't see "-march=aarch64" is a valid flag on either LLVM or GCC. >
2014 Dec 16
2
[LLVMdev] [Compiler-rt] -march=aarch64 flag in gcc/clang
On 16 December 2014 at 21:12, Gundapaneni, Sumanth <sgundapa at quicinc.com> wrote: > The point here is, if you are not building for Android. > You will hit this patch with cmake configuration -DCOMPILER_RT_TEST_TRIPLE=aarch64-linux-gnu > > + elseif("${COMPILER_RT_TEST_TARGET_ARCH}" MATCHES "aarch64") > + test_target_arch(aarch64
2020 Jul 15
2
[MTE] Tagging Globals
Hello, We're evaluating memory tagging (MTE) on some internal workloads. We noticed that stack variables are tagged by an instrumentation pass and heap objects are handled by the allocator (Scudo). How about global variables? We tried a simple case using -march=armv8a+memtag -fsanitize=memtag, but found no tagging: Are we missing anything or tagging globals is still in progress? int
2020 Jul 15
2
[MTE] Tagging Globals
Thanks for the update, Phillips. Yes, please add me, Stephen and Ana (CCed) to Phabricator reviews. Zhaoshi From: Mitch Phillips <mitchp at google.com> Sent: Tuesday, July 14, 2020 19:10 To: Zhaoshi Zheng <zhaoshiz at quicinc.com> Cc: llvm-dev at lists.llvm.org; Stephen Long <steplong at quicinc.com> Subject: [EXT] Re: [llvm-dev] [MTE] Tagging Globals Hi Zhaoshi, Currently
2012 Mar 27
2
Constructing Distance matrix for hclust
Hi, I have similarity value between string pairs in a mysql database. I need to construct the distance matrix which hclust can take and cluster the strings. Most of the examples I came across show how to construct the distance matrix using dist function. How can I code to construct distance matrix using the data in mysql db. Thanks a lot for any help. [[alternative HTML version deleted]]
2018 May 08
2
Pointer size bugs when compiling for android arm64?
I'm trying to do a standalone build of Opus and I get the following messages when compiling for android arm64 using clang:   CC       silk/fixed/arm/warped_autocorrelation_FIX_neon_intr.lo silk/fixed/arm/warped_autocorrelation_FIX_neon_intr.c:43:37: warning: incompatible pointer types assigning to 'const long *' from 'long long *' [-Wincompatible-pointer-types]    
2017 Apr 05
2
Difference in EHType between ARM and AArch64
Joerg, Referring to your patch https://reviews.llvm.org/rL291172. / switch (MAI->getExceptionHandlingType()) {// // case ExceptionHandling::SjLj:// // case ExceptionHandling::DwarfCFI:// // case ExceptionHandling::ARM:// //*isCFIMoveForDebugging = true;*// //*if (MAI->getExceptionHandlingType() != ExceptionHandling::DwarfCFI)*/*/ /**/ break;/*/ // for (auto &F:
2007 Oct 16
4
Xen for IBM 970MP
Hi All, We are planning to support the XEN on IBM PowerPC 970MP based blade which is running SUSE 10 Operating System. We have couple of queries regarding support XEN: 1. Is there any readily available patch for SUSE 10(as a guest) to support paravertualization? 2. Is there any porting required for XEN source for IBM 970MP? 3. Is it support both paravertualization and Hypervisor ?, If yes,
2019 Oct 02
2
fixup_aarch64_movw support for COFF AArch64
Hi Everyone, I'm working Chromium targeting Windows on ARM64 platform. As a part of this work I ran into an issue related to llvm in Swiftshader. Currently fixup_aarch64_movw relocation type is not supported for COFF ARM64 (AArch64WinCOFFObjectWriter). As far as I see, Microsoft hasn't defined indicator for this relocation type. I haven't seen documented anywhere. For AArch32