similar to: InlineAsm and allocation to wrong register for indirect access

Displaying 20 results from an estimated 1000 matches similar to: "InlineAsm and allocation to wrong register for indirect access"

2018 Mar 16
2
Mapping InlineAsm parameters to ConstraintInfoVector elements
Hi all, I'm trying to figure out which parameters of a given InlineAsm instruction are its inputs, and which are the outputs (rationale: make sure MSan doesn't check the output parameters of an asm() statement). As far as I understand, this information is only available through the ConstraintInfoVector for the InlineAsm. However there's no exact match between the constraints and the
2018 Mar 16
0
Mapping InlineAsm parameters to ConstraintInfoVector elements
Could you provide an example where MSan checks an output parameter? On Fri, Mar 16, 2018 at 9:53 AM, Alexander Potapenko via llvm-dev <llvm-dev at lists.llvm.org> wrote: > Hi all, > > I'm trying to figure out which parameters of a given InlineAsm instruction > are its inputs, and which are the outputs (rationale: make sure MSan > doesn't check the output parameters of
2013 Apr 24
2
[LLVMdev] issues with InlineAsm class and #APP/#NOAPP
When the compiler emits assembly code in gcc, there is no #APP/#NOAPP In my case, I'm creating inline assembly IR as part of the compilation process (not user supplied). These are for compiler generated stubs. So I'm seeing these #APP,#NOAPP wrappers which are meant for user inline assembly. Since I'm generating a lot of inline assembly and then each line is enclosed by this
2013 Apr 24
0
[LLVMdev] issues with InlineAsm class and #APP/#NOAPP
compiler generated inline assembly looks odd. What is it that prevents the llvm backend from printing the assembly you need for the stubs? On 24 April 2013 17:58, reed kotler <rkotler at mips.com> wrote: > When the compiler emits assembly code in gcc, there is no #APP/#NOAPP > > In my case, I'm creating inline assembly IR as part of the compilation > process (not user
2015 Mar 03
5
[LLVMdev] Inline Assembly: Memory constraints with offsets
Hi, I'm trying to implement the ZC inline assembly constraint for Mips. This constraint is a memory constraint that expands to an address with an offset (the range of the offset varies according to the subtarget), so the inline assembly in: int data[10]; void ZC(void) { asm volatile ("foo %0 %1" : : "ZC"(data[1]), "ZC"(data[2])); } Should expand to
2006 Dec 14
3
[LLVMdev] ThisCall / Compilation problems
Hi all, A few things. Firstly, I've got a working implementation of the X86ThisCall calling convention, but I'm unsure how to go about submitting it. (I'm not really sure how to go about creating patch files etc, but would like to contribute to the project). Also, I'm using MS Visual C++ Express, and there are a few things that stop llvm1.9 (and the current CVS release) from
2018 Apr 11
0
Adding DebugLoc to machine instructions generated from InlineAsm constants
Hi I'm trying to find the specific place where a MachineInstr is generated from an InlineAsm IR instruction's constant input argument because I want to label it with the correct DebugLoc. Currently, the InlineAsm MachineInstr itself has the correct DebugLoc, but all the MOVs to registers that are spawned for any (e.g. integer) constant input arguments do not have DebugLoc associated with
2013 Mar 11
1
[LLVMdev] Question about InlineAsm
Hello, I'm new with the llvm, and I trying to write a transformation adding some lines of asm to a code. My code is like this, Type *VoidTy = llvm::Type::getVoidTy(getGlobalContext()); llvm::FunctionType *ty = llvm::FunctionType::get(VoidTy, false); InlineAsm *iv = InlineAsm::get( ty, "mov $55, %eax", "", true ); // <----- here SmallVector<llvm::Value*,
2013 Oct 21
0
[LLVMdev] Instruction Emitter crash when emitting glued InlineAsm SDNode
Hi, I'm getting an Instruction emitter crash when emitting an INLINEASM SDNode that is Glued to other nodes. The crash happens at line 808 of file llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp: const MCInstrDesc &MCID = TII->get(F->getMachineOpcode()); with the assertion: assert(isMachineOpcode() && "Not a MachineInstr opcode!"); I'm not a great expert
2013 Apr 24
0
[LLVMdev] issues with InlineAsm class and #APP/#NOAPP
On 24 April 2013 18:30, reed kotler <rkotler at mips.com> wrote: > There are a lot of issues. > > For one, the function I'm compiling is a mips16 function but the stubs being > created are mips32 functions. > This looks similar to thumb x 32 bit arm. Wouldn't a similar solution work for it? Cheers, Rafael
2013 Apr 24
2
[LLVMdev] issues with InlineAsm class and #APP/#NOAPP
There are a lot of issues. For one, the function I'm compiling is a mips16 function but the stubs being created are mips32 functions. On 04/24/2013 03:25 PM, Rafael Espíndola wrote: > compiler generated inline assembly looks odd. What is it that prevents > the llvm backend from printing the assembly you need for the stubs? > > On 24 April 2013 17:58, reed kotler <rkotler at
2010 Mar 16
3
[LLVMdev] LLVM-GCC generating too much code from inline assembly
Hi, I recently switched to LLVM-GCC 4.2 on OS X, to go around a bug caused by gcc with optimized code. Unfortunately, I ran into another weird problem on LLVM-GCC. In my code, there's a file with a bunch of inline assembly blocks, that worked fine with GCC 4.2. Now, when compiling with LLVM-GCC 4.2, weird things happen. Here's an example: (the blocks are larger than that, but a single
2012 Sep 14
2
[LLVMdev] tablegen and ptr_rc: PointerLikeRegClass
Hi all, I've been poking at AsmParser support for powerpc64 (ppc64-elf-linux-abi) and have run into some behavior I don't understand with the ptr_rc references coming out of the PPC*.td files when generating the asm-matcher files. For instance : $ ./build/bin/llvm-tblgen llvm/lib/Target/PowerPC/PPC.td -I ~/llvm-head/llvm/include -I ~/llvm-head/llvm/lib/Target/PowerPC/ -gen-asm-matcher
2010 Mar 16
0
[LLVMdev] LLVM-GCC generating too much code from inline assembly
You may find it helpful to reference http://www.ibiblio.org/gferg/ldp/GCC-Inline-Assembly-HOWTO.html. In particular, the information regarding clobbers and constraints. Generally speaking, it's best not to use inline assembly at all. What are you trying to do that you find it necessary? On Mar 16, 2010, at 12:30 AM, Fred / Kettch wrote: > Hi, > > I recently switched to LLVM-GCC
2009 Jul 31
2
[LLVMdev] Inserting Instructions (pass)
Hi, I' am trying to insert an InlineAsm Instruction in my pass, which FunctionType do I need for Inlineasm? If I understand it right, I need a call instruction to insert the new produced InlineAsm? Thanks for help, Michael for (BasicBlock::iterator bi = i->begin(), be = i->end(); bi != be; ++bi){ std::vector<const Type*> asm_arguments;
2014 Jan 29
6
[LLVMdev] making emitInlineAsm protected
I would like to make the following member of AsmPrinter be protected void EmitInlineAsm(StringRef Str, const MDNode *LocMDNode = 0, InlineAsm::AsmDialect AsmDialect = InlineAsm::AD_ATT) const; I have some stubs that I want to emit in MipsAsmParser . Are there any objections to doing this? Reed
2013 Apr 25
1
[LLVMdev] issues with InlineAsm class and #APP/#NOAPP
I'm happy to send you my patch as it stands today. It's not cleaned up yet all or tested thoroughtly but you can look at what I'm doing and maybe suggest some alternate paths and if it's not a matter of redoing everything, I would consider making some changes. Here is a sample stub: Consider this line of code: extern float fpff(float); We have no idea if this is a mips16 or
2009 Jul 31
0
[LLVMdev] Inserting Instructions (pass)
On Jul 31, 2009, at 10:24 AM, Michael Graumann wrote: > Hi, > I’ am trying to insert an InlineAsm Instruction in my pass, which > FunctionType do I need for Inlineasm? > If I understand it right, I need a call instruction to insert the > new produced InlineAsm? > > Thanks for help Inline asm works like a "callee". So for: call void asm sideeffect
2013 Apr 24
0
[LLVMdev] issues with InlineAsm class and #APP/#NOAPP
> We also wanted the stubs to be real functions to llvm. That allows them to > participate properly > in optimization of various levels (including LTO). They can even be inlined. > There are other > planned optimizations that would not work if they were not legitimate > functions. I am not saying that the functions should not exist in the IL, just that they should not be inline
2016 Jun 30
4
Help required regarding IPRA and Local Function optimization
Hello Mentors, I am currently finding bug in Local Function related optimization due to which runtime failures are observed in some test cases, as those test cases are containing very large function with recursion and object oriented code so I am not able to find a pattern which is causing failure. So I tried following simple case to understand expected behavior from this optimization. Consider