Displaying 20 results from an estimated 1000 matches similar to: "[GlobalISel][RFC] Thoughts on MachineModulePass"
2013 Jun 10
1
[LLVMdev] Whole program alias analysis in backend
Hi,
On 06/10/2013 09:13 AM, Jonas Wagner wrote:
> Hi,
>
> I know that backend processes one function at a time,
> is it somehow possible to do there a whole program analysis,
> or could you give me some guidelines?
>
>
The backend introduces a MachineFunctionPass, from which point on it is
only possible to run FunctionPasses, otherwise the machine functions
2016 Jan 22
8
[GlobalISel][RFC] Thoughts on MachineModulePass
Hi,
In the initial thread of the proposal for GlobalISel, I have mentioned that it may be interesting to have a kind of MachineModulePass.
Marcello mentioned this would be useful for their current pipeline.
I am interested in knowing:
1. If anyone else is interested for such concept?
2. What kind of information should we make accessible in an hypothetical MachineModule? I.e., how do you plan to
2013 Jun 10
0
[LLVMdev] Whole program alias analysis in backend
Hi,
I know that backend processes one function at a time,
> is it somehow possible to do there a whole program analysis,
> or could you give me some guidelines?
>
There are different kinds of LLVM passes: Those that process a function at
a time (FunctionPass), but also those that work on the call graph
(CallGraphSCCPass) or on an entire module (ModulePass). These are described
in the
2013 Jun 10
3
[LLVMdev] Whole program alias analysis in backend
Hello everyone,
we are planning to implement a stronger alias analysis
for backend, because e.g. for VLIW architectures, this is our main
performance limitation.
I would have 2 questions regarding this.
I know that backend processes one function at a time,
is it somehow possible to do there a whole program analysis,
or could you give me some guidelines?
Which alias analysis algorithm
2016 Mar 16
3
[GSoC 2016] Need more info on Add a MachineModulePass
Hello,
Probably this may be too late to start thinking about this project but I
think this is particularly useful feature for LLVM. A quick use I can think
of this is Implementing Inter-procedural Register Allocation ( for Research
purpose ).
I have start looking at the code for MachineFunctionPass, I think currently
MachineModule class is not available ( the project work will include that )
but
2016 Mar 20
2
[GSoC 2016] Need more info on Add a MachineModulePass
On 3/18/16 12:33 PM, Quentin Colombet via llvm-dev wrote:
> Hi Vivek,
>
>> On Mar 16, 2016, at 1:00 PM, vivek pandya via llvm-dev
>> <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote:
>>
>> Hello,
>>
>> Probably this may be too late to start thinking about this project
>> but I think this is particularly useful
2016 Mar 18
2
[GSoC 2016] Need more info on Add a MachineModulePass
*Vivek Pandya*
On Fri, Mar 18, 2016 at 10:03 PM, Quentin Colombet <qcolombet at apple.com>
wrote:
> Hi Vivek,
>
> On Mar 16, 2016, at 1:00 PM, vivek pandya via llvm-dev <
> llvm-dev at lists.llvm.org> wrote:
>
> Hello,
>
> Probably this may be too late to start thinking about this project but I
> think this is particularly useful feature for LLVM.
>
2012 Jul 30
0
[LLVMdev] global control flow graph at machine code level
Hi Abhishek,
On Sunday, July 29, 2012 18:32:11 AbhishekR wrote:
> It seems like I may have to modify the way MachineFunction is instantiated in MachineFunctionAnalysis. Instead of doing it per Function, it may have to be done for the entire Module by instantiating MachineFunction objects for every Function inside the Module. This might require major changes to the PassManager framework as well.
2012 Jul 29
3
[LLVMdev] global control flow graph at machine code level
Hi all,
I am trying to build a global control flow graph at machine code level.
Essentially, I need the handles to the MachineFunction's corresponding to
every call site inside a MachineFunction in order to get the handles to
MachineBasicBlock's with return statements inside the callee. Currently,
the codegen module processes one MachineFunction at a time and hence I
can't find a way
2016 Jan 29
1
MachineModule pass
Hello everyone,
As I mentioned in my previous posts,I am using a machinefunction pass to
find all the loops in the program and do some analysis on them. I have
completed my pass now and it works correctly. but the only issue is that,I
have noticed that if I have two functions in my program, and one of them is
part of the loop for another one ,by using runonmachinefunction(), I will
get one loop
2016 May 11
4
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
> On May 10, 2016, at 6:06 PM, Hal Finkel <hfinkel at anl.gov> wrote:
>
>
>
> From: "vivek pandya" <vivekvpandya at gmail.com>
> To: "llvm-dev" <llvm-dev at lists.llvm.org>, "Tim Amini Golling" <mehdi.amini at apple.com>, "Hal Finkel" <hfinkel at anl.gov>
> Cc: "Quentin Colombet" <qcolombet
2011 Nov 04
2
How to write a shapefile with projection
Hi,
?
I am trying to write a shapefile with projection. I have
my data in a data.frame called try and consists in xy coordinates and a
numerical attribute value z1.
?
Libraries loaded are: sp, rgdal, raster, maptools
?
head(try)
???????? x?????? ??? y??? ? ? ? ? ? ? ??? z1
1 610237.1 ???????? 3375751
???????????? 8.221
2 610236.1 ???????? 3375750
???????????? 8.153
3 610236.1 ????????
2010 Apr 13
3
liebert esp2 new version + crest factor
Hello,
1) I'm planning on adding lots of measurements to the driver liebert-esp2 +
correct support for 3-phase systems. Should I make a large patch based on
the last svn head or send you the whole file? Multiple patches per change
are probably not practical in this case.
2) in http://www.networkupstools.org/doc/2.2.0/new-names.html there is no
crest factor variable. Crest factor is very
2016 Mar 08
3
Deleting function IR after codegen
> On Mar 8, 2016, at 11:50 AM, Eric Christopher <echristo at gmail.com> wrote:
>
>
>
>
> I could attach a patch, but first i’d really like to know if anyone is fundamentally opposed to this.
>
>
> Not necessarily. I think that any information that isn't being serialized in MI right now for a function could be as well. Definitely something for GlobalISel
2016 May 15
2
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
> On May 15, 2016, at 12:43 AM, vivek pandya <vivekvpandya at gmail.com> wrote:
>
>
>
> Vivek Pandya
>
>
> On Wed, May 11, 2016 at 9:43 AM, Mehdi Amini <mehdi.amini at apple.com <mailto:mehdi.amini at apple.com>> wrote:
>
>> On May 10, 2016, at 6:06 PM, Hal Finkel <hfinkel at anl.gov <mailto:hfinkel at anl.gov>> wrote:
>>
2016 May 11
3
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
*Vivek Pandya*
On Wed, May 11, 2016 at 10:02 AM, vivek pandya <vivekvpandya at gmail.com>
wrote:
>
>
> *Vivek Pandya*
>
>
> On Wed, May 11, 2016 at 9:43 AM, Mehdi Amini <mehdi.amini at apple.com>
> wrote:
>
>>
>> On May 10, 2016, at 6:06 PM, Hal Finkel <hfinkel at anl.gov> wrote:
>>
>>
>>
>>
2012 Mar 10
1
How to fit a line through the "Mountain crest", i.e., through the highest density of points - in a "loess-like" fashion.
Hi,
I'm trying to normalize data by fitting a line through the highest density
of points (in a 2D plot).
In other words, if you visualize the data as a density plot, the fit I'm
trying to achieve is the line that goes through the "crest" of the mountain.
This is similar yet different to what LOESS does. I've been using loess
before, but it does not exactly that as it takes
2016 Jul 17
6
RFC: Enabling Module passes post-ISel
Hi,
[Apologies to those receiving this mail twice - used the old list address
by accident]
In LLVM it is currently not possible to write a Module-level pass (a pass
that modifies or analyzes multiple MachineFunctions) after DAG formation.
This inhibits some optimizations[1] and is something I'd like to see
changed.
The problem is that in the backend, we emit a function at a time, from DAG
2016 May 18
2
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
*Vivek Pandya*
On Wed, May 11, 2016 at 4:01 PM, Hal Finkel <hfinkel at anl.gov> wrote:
>
> ------------------------------
>
> *From: *"vivek pandya" <vivekvpandya at gmail.com>
> *To: *"Mehdi Amini" <mehdi.amini at apple.com>
> *Cc: *"Hal Finkel" <hfinkel at anl.gov>, "Quentin Colombet" <
> qcolombet at
2016 May 18
2
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
*Vivek Pandya*
On Wed, May 18, 2016 at 11:25 PM, Quentin Colombet <qcolombet at apple.com>
wrote:
>
> On May 18, 2016, at 10:46 AM, vivek pandya <vivekvpandya at gmail.com> wrote:
>
>
>
> *Vivek Pandya*
>
>
> On Wed, May 11, 2016 at 4:01 PM, Hal Finkel <hfinkel at anl.gov> wrote:
>
>>
>> ------------------------------
>>
>>