Displaying 20 results from an estimated 1100 matches similar to: "Substitute instruction with a jump to a library code"
2016 May 12
3
Why LR is saved before calling a 'noreturn' function ?
Dear all,
I don't get how llvm handles functions with __attribute__((noreturn)).
It seems that LR register is backed up on the stack whilst it will never be used to return from a 'noreturn' function.
I have this problem with a home-made backend but it seems that ARM flavour of clang has same behaviour.
By the way, SP is also saved, I don't understand why.
Is there a syntax error
2017 May 02
4
[ARM/Thumb] Make a function in arm while in Thumb triple
Hi,
I wanted to know if it was possible to force ARM backend to compile a
function in ARM while the rest is in Thumb mode.
I tried the attributes which is used in GCC but it doesn't work.
Here is what I tried:
https://pastebin.com/jCr5LPUY
Thanks in advance,
Uvekilledkenny
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2012 Jul 23
0
[LLVMdev] Setting up a cross-compiler for cortex-m3
On Sun, Jul 22, 2012 at 11:12 PM, Renato Golin <rengolin at systemcall.org> wrote:
> On 22 July 2012 22:03, salvatore benedetto
> <salvatore.benedetto at gmail.com> wrote:
>> While we are at it, if a new comer would like to understand where everything
>> takes place, where should he look?
>>
>> I did a grep in the source and eventually ended up in
2012 Jul 22
3
[LLVMdev] Setting up a cross-compiler for cortex-m3
On 22 July 2012 22:03, salvatore benedetto
<salvatore.benedetto at gmail.com> wrote:
> While we are at it, if a new comer would like to understand where everything
> takes place, where should he look?
>
> I did a grep in the source and eventually ended up in clang/something/driver.
That's pretty much it: clang/lib/Driver
2012 Jul 22
3
[LLVMdev] Setting up a cross-compiler for cortex-m3
On Wed, Jul 18, 2012 at 6:08 PM, salvatore benedetto
<salvatore.benedetto at gmail.com> wrote:
> On Wed, Jul 18, 2012 at 5:45 PM, Renato Golin <rengolin at systemcall.org> wrote:
>> On 18 July 2012 15:46, salvatore benedetto
>> <salvatore.benedetto at gmail.com> wrote:
>>> $ clang++ -ccc-host-triple thumbv7m-none-gnueabi noInclude.cpp -c
>>>
2014 Dec 19
2
[LLVMdev] questions about ARM EABI attributes
ARM backend emits different eabi build attributes based on the ISA variant
the target supports or whether certain fast-math options are passed on the
command line. For example, these are the attributes that have different
values depending on whether -ffast-math is passed to clang:
$ clang -target armv7-linux-gnueabi -ffast-math (with -ffast-math)
.eabi_attribute 20, 2 @ Tag_ABI_FP_denormal
2012 Jul 18
0
[LLVMdev] Setting up a cross-compiler for cortex-m3
On Wed, Jul 18, 2012 at 5:45 PM, Renato Golin <rengolin at systemcall.org> wrote:
> On 18 July 2012 15:46, salvatore benedetto
> <salvatore.benedetto at gmail.com> wrote:
>> $ clang++ -ccc-host-triple thumbv7m-none-gnueabi noInclude.cpp -c
>> --sysroot=/home/emitrax/CodeSourcery/Sourcery_G++_Lite/arm-none-linux-gnueabi/libc/
>
> Try -ccc-gcc-name
2012 Jul 18
3
[LLVMdev] Setting up a cross-compiler for cortex-m3
On 18 July 2012 15:46, salvatore benedetto
<salvatore.benedetto at gmail.com> wrote:
> $ clang++ -ccc-host-triple thumbv7m-none-gnueabi noInclude.cpp -c
> --sysroot=/home/emitrax/CodeSourcery/Sourcery_G++_Lite/arm-none-linux-gnueabi/libc/
Try -ccc-gcc-name arm-none-linux-gnueabi-g++ -ccc-host-triple
thumbv7m-none-linux-gnueabi
Sometimes it's better than sysroot, as it finds it
2012 Jul 22
2
[LLVMdev] Setting up a cross-compiler for cortex-m3
On Sun, Jul 22, 2012 at 9:42 PM, Anton Korobeynikov
<anton at korobeynikov.info> wrote:
>> Any suggestions?
> Try to specify CPU explicitly.
Already did.
clang++ -ccc-gcc-name arm-none-linux-gnueabi-g++ -ccc-host-triple
thumbv7m-none-gnueabi testReference.cpp -c -mcpu=cortex-m3
fatal error: error in backend: CPU: 'cortex-m3' does not support ARM
mode execution!
S.
2012 Jul 22
0
[LLVMdev] Setting up a cross-compiler for cortex-m3
> clang++ -ccc-gcc-name arm-none-linux-gnueabi-g++ -ccc-host-triple
> thumbv7m-none-gnueabi testReference.cpp -c -mcpu=cortex-m3
> fatal error: error in backend: CPU: 'cortex-m3' does not support ARM
> mode execution!
Ok, and what's about -mthumb then?
--
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University
2019 Jul 12
2
[cfe-dev] ARM float16 intrinsic test
Hi,
I do not get your result. Do I miss something?
$COMP_ROOT/clang++ --target=arm-arm-eabihf -march=armv8.2a+fp16
arm.cpp -S -o - -O3
.text
.syntax unified
.eabi_attribute 67, "2.09"
.eabi_attribute 6, 14
.eabi_attribute 7, 65
.eabi_attribute 8, 1
.eabi_attribute 9, 2
.fpu crypto-neon-fp-armv8
.eabi_attribute 12, 4
2012 Sep 26
0
[LLVMdev] [Questions] clang cross compilation and SimpleScalar simulation
Dear all
I use arm-linux-gcc 2.95.2, because the code generated by version 3.X and
4.X can not run on SimpleScalar.
So I use the arm-linux-gcc 2.95.2 *only*, the version is recommended by
SimpleScalar.
The code generated by arm-linux-gcc 2.95.2 can run on SimpleScalar.
Now I want to use llvm/clang to generate ARM assembly code and
arm-linux-gcc 2.95.2 to be assembler.
Unfortunately, I got some
2012 Sep 26
1
[LLVMdev] [Questions] clang cross compilation and SimpleScalar simulation
Simplescalar is not compatible with llvm because the binutils simplescalar is based on is ancient.
Jim
On Sep 26, 2012, at 12:21 AM, 陳奕梅 <ymchen at sslab.cs.nctu.edu.tw> wrote:
> Dear all
>
> I use arm-linux-gcc 2.95.2, because the code generated by version 3.X and 4.X can not run on SimpleScalar.
> So I use the arm-linux-gcc 2.95.2 *only*, the version is recommended by
2013 Oct 15
2
[LLVMdev] Unwanted push/pop on Cortex-M.
Hi Andrea,
That is because the LR is the fixed register as per the
http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042e/IHI0042E_aapcs.pdf
and out_char() function is not the leaf function ,Hence compiler
tends to save and restore the LR and the save and restore of
register r11 is to align stack for 8 bytes as per ARM EABI.
Thanks
~Umesh
On Tuesday, October 15, 2013, Umesh Kalappa
2013 Oct 15
1
[LLVMdev] Unwanted push/pop on Cortex-M.
Hi andrea,
R11 treated as frame pointer at arm backend , which is fixed again .
Thanks
Umesh
On Tuesday, October 15, 2013, Andrea Mucignat <andrea at nestlabs.com> wrote:
> Umesh,
> Makes some sort of sense to me, OTOH:
> If instead of choosing r11 as a "dummy" to align the stack we had chosen
some other register in the range r0-r7 then we could have emitted the PUSH
2013 Oct 15
0
[LLVMdev] Unwanted push/pop on Cortex-M.
Umesh,
Makes some sort of sense to me, OTOH:
If instead of choosing r11 as a "dummy" to align the stack we had chosen
some other register in the range r0-r7 then we could have emitted the PUSH
encoding T1 (2 bytes opcode) as opposed to the encoding T2 (which is a 4
bytes opcode).
A
On Tue, Oct 15, 2013 at 2:59 AM, Umesh Kalappa <umesh.kalappa0 at gmail.com>wrote:
> Hi
2010 Sep 10
3
[LLVMdev] Cross-compiling the ARM toolchain
On 10 September 2010 04:47, Liu <proljc at gmail.com> wrote:
> trying this:
> clang -march=armv7-a -mcpu=cortex-a9 -ccc-host-triple
> arm-none-linux -ccc-gcc-name arm-none-linux-gnueabi-gcc a.c
Hi Liu,
That doesn't work for me.
$ clang -march=armv7-a -mcpu=cortex-a9 -ccc-host-triple arm-none-linux
-ccc-gcc-name arm-none-linux-gnueabi-gcc alias.c
clang: warning: unknown
2012 Sep 24
4
[LLVMdev] [Questions] clang cross compilation and SimpleScalar simulation
Hello,
I want to compile MiBench by clang, and the target-ISA is armv4. The code
generated using llvm-2.9, clang-2.9, and arm-linux-gcc (gcc version
2.95.2), simulator is sim-panalyzer 2.0.3 .
I use these commends:
$ clang -O3 -o hello.ll -c -emit-llvm hello.c
$ llc -O3 -o hello.s -march=arm -mcpu=strongarm1100 hello.ll
$ arm-linux-gcc -O3 -march=armv4 -mcpu=strongarm1100 -static
2018 Feb 03
2
broken dependencies on 2cd4u
As of a few days I'm seeing this error on travis:
The following packages have unmet dependencies:
libleptonica-dev : Depends: liblept5 (= 1.74.4-1+nmu1ppa1~trusty1)
but it is not going to be installed
Which is caused by:
The following packages have unmet dependencies:
liblept5 : Depends: libopenjp2-7 (>= 2.0.0) but it is not installable
This is caused by the recent update libleptonica
2011 May 17
2
[LLVMdev] [Patch] Let MC/ELF generate Thumb/Thumb-2 are properly
> Thanks for the review and checkin.
Thanks for the patch!
> Regarding elf-thumbfunc-reloc.ll, it seems to me that current ARMAsmParser
> doesn't recognize "(PLT)", so something like "bl foo(PLT)" doesn't work
> consequently. And I don't know how to write .s to test this without (PLT).
NP. Can you just add that as a FIXME in elf-thumbfunc-reloc.ll?