similar to: [LLVMdev] [PATCH][RFC] HSAIL Target

Displaying 20 results from an estimated 2000 matches similar to: "[LLVMdev] [PATCH][RFC] HSAIL Target"

2015 Jul 01
5
[LLVMdev] [PATCH][RFC] HSAIL Target
> On Jun 22, 2015, at 9:31 AM, Rafael Espíndola <rafael.espindola at gmail.com> wrote: > > This part is scary. > > Having a third party library dependency is very undesirable from a testing perspective. > > I agree, but it’s what we are stuck with for now. It’s an optional dependency now, so most people building LLVM won’t need to worry about it > > One of
2016 Apr 01
4
DAGIR
Hello all, The rich history of binary distribution formats based on LLVM [0][1][2][3][4] has proven LLVM's viability as a launchpad for stable platforms. However, issues with compilation time and compiler size have suggested that the translator must do too much, i.e. LLVM IR isn't a low-level enough virtual machine. So we introduce DAGIR ("dagger"), a new portable close to the
2014 Nov 14
3
[LLVMdev] memory scopes in atomic instructions
On 11/15/2014 12:08 AM, Tom Stellard wrote: > Can you send a plain-text version of this email. It's easier to read > and reply to. Sorry about that! Here's the plain text (I hope!): Hi all, OpenCL 2.0 introduced the notion of memory scope in atomic operations to global memory. These scopes are a hint to the underlying platform to optimize how synchronization is achieved. HSAIL
2016 Mar 05
2
[AMDGPU] non-hsa intrinsic with hsa target
Hi Mr. Liu, Thanks for your quick reply. I compiled the code with the libclc_trunk and linked the bitcode file under $LIBCLC_DIR/built_libs/tahiti-amdgcn--.bc. After looking into the libclc, it is currently using the new workitem intrinsics (commit ba9858caa1e927a6fcc601e3466faa693835db5e). In the linked bitcode ($LIBCLC_DIR/built_libs/tahiti-amdgcn--.bc), it has the following code segment,
2008 Mar 26
2
Dialing off-hook with Polycom SoundPoint IP 430
Hi... I've been fighting this for a while now, trying clean builds of Asterisk 1.14.18, 1.14.19rc3, and then 1.6 Beta 6 today. No workee. :-( Here's the results for various calls made off-hook (push the blue Speakerphone button on the Polycom 430): 988852700 - Phone waits for me to either hit the soft-key "Send" or "EndCall". If I hit "Send",
2014 Nov 14
4
[LLVMdev] memory scopes in atomic instructions
2014 Nov 19
2
[LLVMdev] memory scopes in atomic instructions
On 11/19/2014 4:05 AM, Chandler Carruth wrote: > > On Fri, Nov 14, 2014 at 1:09 PM, Sahasrabuddhe, Sameer > <sameer.sahasrabuddhe at amd.com <mailto:sameer.sahasrabuddhe at amd.com>> > wrote: > > 1. Update the synchronization scope field in atomic instructions > from a > single bit to a wider field, say 32-bit unsigned integer. > > > I
2015 Jan 08
2
[LLVMdev] Is address space 1 reserved?
On 1/8/2015 1:55 AM, Philip Reames wrote: >>>> I think the problems aren’t so much that accessing 0 doesn’t work >>>> (although I imagine there are problems with that), but expectations >>>> of comparison with null. The main problem I’m aware of is >>>> comparisons with null pointers. The first global object in >>>> addrspace(3) will
2016 Mar 29
1
Memory scope proposal
Ke, I'll be the bearer of bad news here. The radio silence this proposal has gotten probably means there is not enough interest in the community in this proposal to see it land. One concern I have with the current proposal is that the optimization value of these scopes is not clear to me. Is it only the backend which is expected to support optimizations over these scopes? Or are you
2003 Jul 02
1
Recovering printer drivers ][
... Since I got no answers to my previous post about "forgotten" printer drivers that is printer drivers that disappear after you reinstall a samba and brig back all .tdb from back-up I said what a hell let's try adding the printer drivers again. You guessed, it didn't worked. After asking me for the printer driver location XP ws returns a message that "Operation could not
2007 Jan 28
1
Batch print office documents?
Hello: I need to build a system like this for a client: I will have a Linux server in a data room. It will have a web interface where the users may upload files. The files may be: Word, Excel, PDF, tif files, etc. Now, using the web interface, they should be able to brig up a list of files, select a set to print and send them to a local printer that is running as a shared printer on a Windows
2015 Jan 07
2
[LLVMdev] Is address space 1 reserved?
> On Jan 7, 2015, at 3:10 PM, Philip Reames <listmail at philipreames.com> wrote: > > > On 01/07/2015 12:05 PM, Matt Arsenault wrote: >> >>> On Jan 7, 2015, at 2:55 PM, Philip Reames <listmail at philipreames.com <mailto:listmail at philipreames.com>> wrote: >>> >>> >>> On 01/07/2015 11:52 AM, Matt Arsenault wrote:
2015 Jan 07
3
[LLVMdev] [RFC][PATCH][OPENCL] synchronization scopes redux
On 1/7/2015 8:59 AM, Chandler Carruth wrote: > > Essentially, I think target-independent optimizations are still > attractive, but we might want to just force them to go through an > actual target-implemented API to interpret the scopes rather than > making the interpretation work from first principles. I just worry > that the targets are going to be too different and we may
2007 Jul 12
0
No subject
<digitmap =20 dialplan.digitmap=3D"[2-9]11|0T|011xxx.T|[0-1][2-9]xxxxxxxxx|[2-9]xxxxxxx= x x|[2-9]xxxT" dialplan.digitmap.timeOut=3D"3|3|3|3|3|3"/> Don't think it's been modified from the original supplied. ...brig -----Original Message----- From: asterisk-users-bounces at lists.digium.com [mailto:asterisk-users-bounces at lists.digium.com] On Behalf
2009 Sep 29
4
How can I avoid a for-loop through sapply or lapply ?
Through converting a miRNAs file from FASTA to character format I get a vector which looks like the following: > nml [1] "hsa-let-7a MIMAT0000062 Homo sapiens let-7a" [2] "hsa-let-7b MIMAT0000063 Homo sapiens let-7b" [3] "hsa-let-7c MIMAT0000064 Homo sapiens let-7c" [4] "hsa-let-7d MIMAT0000065 Homo sapiens
2018 Dec 19
5
[RFC] Adding thread group semantics to LangRef (motivated by GPUs)
Hi all, LLVM needs a solution to the long-standing problem that the IR is unable to express certain semantics expected by high-level programming languages that target GPUs. Solving this issue is necessary both for upstream use of LLVM as a compiler backend for GPUs and for correctly supporting LLVM IR <-> SPIR-V roundtrip translation. It may also be useful for compilers targeting
2013 Jan 27
2
rpart
Hi, When I look at the summary of an rpart object run on my data, I get 7 nodes but when I plot the rpart object, I get only 3 nodes. Should the number of nodes not match in the results of the 2 functions (summary and plot) or it is not always the same? Look forward to your reply, Carol -------------------------------------------- ?summary(rpart.res) Call: rpart(formula = mydata$class ~ ., data
2008 Nov 06
1
replacing values in a vector
Hello list. I have a vector of values: eg > head(diff_mirs_list) [1] "hsa-miR-26b" "hsa-miR-26b" "hsa-miR-23a" "hsa-miR-27b" "hsa-miR-29a" [6] "hsa-miR-29b" and I would like to conditionally replace each value in this vector with a number defined in a dataframe: > fc ???????????? Probe ave.fc 1?????? hsa-let-7a?? 1.28 2?????
2010 May 27
3
how to extract the 1st field from a vector of strings
I have the following vector of strings (shown only the first 3 elements) > desc[1:3] [1] "hsa-let-7a MIMAT0000062 Homo sapiens let-7a" [2] "hsa-let-7a* MIMAT0004481 Homo sapiens let-7a*" [3] "hsa-let-7a-2* MIMAT0010195 Homo sapiens let-7a-2*" > is.vector(desc) [1] TRUE > A <- unlist(strsplit(desc[1:3], " ")) > A [1]
2011 Sep 30
1
Hi
Hi, There is a question that I am confused. I have a set of data like this: hsa-miR-205--GATA3 0.797882767 1.08E-13 hsa-miR-205--ITGB4 0.750217593 1.85E-11 hsa-miR-187--PGF 0.797604155 3.24E-11 hsa-miR-205--SERPINB5 0.744124886 3.28E-11 hsa-miR-205--PBX1 0.734487224 7.89E-11 hsa-miR-205--MCC 0.72499934 1.80E-10 hsa-miR-205--WNT5B 0.717705259 3.33E-10 hsa-miR-200c--PKN2 0.721746815