similar to: [LLVMdev] Hwo to guess PC-relative offset

> De : Joerg Sonnenberger [mailto:joerg at britannica.bec.de] > > The basic idea is to still create a relocation on the MC level, but fix it up later. > You didn't say if your ISA is fixed or variable length, the former, can simplify > this quite bit. The constant island pass generally tries to address two issues: > (1) Merging of identical constants. > (2) Splitting the

> De : Joerg Sonnenberger [mailto:joerg at britannica.bec.de] > > Well, MCFixup is what a relocation is represented as internally. They get > resolved to a fixed value and replaced, if evaluateAsAbsolute is true. > Hi Joerg, Actually it fails to get resolved to a fixed value. When I compile to .o then objdump it I can see that a symbol holding the constant value was created in

I have an Access application that work with some shared database file. The file is ~ 3 Mb. Since I have a Linux system with Samba, this application work very slow. I have multiple user with win95 on this file. Is there an option for allowing multiple access without cache ? any other idea ? Thanks. ___________________________________________________________ S?bastien HEITZMANN

Dear all, I don't get how llvm handles functions with __attribute__((noreturn)). It seems that LR register is backed up on the stack whilst it will never be used to return from a 'noreturn' function. I have this problem with a home-made backend but it seems that ARM flavour of clang has same behaviour. By the way, SP is also saved, I don't understand why. Is there a syntax error

On Wed, Oct 09, 2013 at 08:06:42PM -0500, Jay Cornwall wrote: > Hi, > > This patch adds R600/SI disassembly text to compiled object files, when > a code dump is requested, to assist debugging in Mesa clients. > > Here's an example of the output in a Mesa client with a corresponding > patch and RADEON_DUMP_SHADERS set: > > Shader Disassembly: > >

Thanks Tom for your help, it as indeed very easy to make the link with the linker (not sick joke). Unfortunately, clang generates object files for target x86_64, even though I try --target --triple, --arch, ... What is the trick to tell him which target to use ? -- Fred ps: not looked yet at inline assembly 2015-07-09 18:40 GMT+02:00 Tom Stellard <tom at stellard.net>: > On Thu, Jul

Hi all, I have been developping a out-of-tree backend. I would like to integrate it with clang. Note that my backend is rather simple, generates elf32, and I do not need about linux, libary paths, ... Can someone give me a pointer to a readme, an article, or maybe a good (i.e. simple) example ? Note :on a second step, I would like to support inline assembly in C code.. -- Frederic Heitzmann

Dear all, I have been working on a new LLVM backend. Some instructions, like sub, can take an positive constante, encoded into 5 bits thus lower than 32, and a register, as operands. Unfortunately, DAGCombiner.cpp changes patterns like 'sub x, 5' into 'add x,-5'. Similarly, I found changes in some IR to IR passes, with no clear gain (at least not clear to me), and even penalty

Hi all, I use llvm-clang with a MIPS target, and it seems that the backend generates wrong reloc info. I attach a very simple test case. * Compile test.c with 'clang -internal-as -g' * use mips-elf-objdump -S to get the generate assembly code (see test.lst) * use mips-elf-readelf -a to look for relocation info (see test.readelf) All relocations for static data are 0000 ?! I did not

In looking at the code in ARMConstantislandPass.cpp::optimizeThumb2JumpTables(), I see that there is the following condition for not creating tbb-based jump tables: // The instruction should be a tLEApcrel or t2LEApcrelJT; we want // to delete it as well. MachineInstr *LeaMI = PrevI; if ((LeaMI->getOpcode() != ARM::tLEApcrelJT &&

Hi! I trying to configure * in a way, that it uses a different CLIP (Caller-Id in ISDN) per SIP user, when relaying the call from SIP to the ISDN. So far always the main (1st) number of the number-block is sent to the ISDN. I have a E100P from Digium and use the zapata stuff (chan_zap). All SIP calls are coming through an SER. One idea I had in mind is to assign userid's in SIP, that match

hi R users I have a data set with the name AA AA<-1:100 Now I want to get a child array from AA every 10 numbers e.g. ab =c(10,20,30,40,50,60,70,80,100) How could I subtract aa from AA? thank you . -- TANG Jie Email: totangjie@gmail.com Tel: 0086-2154896104 Shanghai Typhoon Institute,China [[alternative HTML version deleted]]

dear all, how can i get a vector that shows the number of the column of matrix that contains the maximum of the row ?? can?t believe in need a loop for this... i have a 100 x 3 matrix and want to get a 100 x 1 vector with values 1,2,3 . there must be a simple solution. i just cannot find it. i think am searching on the wrong end. thx for help in advance. m.

Hi Jakob, You're the unfortunate soul who last touched the constant island pass, right? Do you happen to have any insight for Daniel? Chad On Tue, Jul 23, 2013 at 9:55 AM, Daniel Stewart <stewartd at codeaurora.org>wrote: > In looking at the code in > ARMConstantislandPass.cpp::optimizeThumb2JumpTables(), I see that there is > the following condition for not creating

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hello everybody, I would like to use managesieve protocol and cmusieve plugin at the same time. I have used the cmusieve plugin for years and I now also enabled the managesieve system. I got the managesieve system working but when I activate the managesieve filter for the user the cmusieve sieve filter is not used anymore. How can I have both sieve

Hi, We at Rust are using LLVM for our codegen. Since Rust version 1.19.0, which should ship in July 21st, we are using a slightly patched version of LLVM 4.0. The transition to LLVM 4.0 had been fairly pain-free on x86 (at least excluding the standard suite of assertion failures using MSVC SEH, but that's fairly under control), but we have encountered several scary bugs in ARM, most

2015-07-08 17:58 GMT+02:00 escha <escha at apple.com>: > [...] > > If you want to “revert" this sort of thing, you can do it at Select() time > or PreprocessISelDAG(), which is what I did on an out-of-tree backend to > turn add X, -C into sub X, C on selection time. This still lets all the > intermediate optimizations take advantage of the canonicalization. > >

I have > df quantity branch client date name 1 10 1 1 2010-01-01 one 2 20 2 1 2010-01-01 one 3 30 3 2 2010-01-01 two 4 15 4 1 2010-01-01 one 5 10 5 2 2010-01-01 two 6 20 6 3 2010-01-01 three 7 1000 1 1 2011-01-01 one 8 2000 2 1 2011-01-01

On Jul 29, 2013, at 6:50 AM, Chad Rosier <chad.rosier at gmail.com> wrote: > Hi Jakob, > You're the unfortunate soul who last touched the constant island pass, right? Do you happen to have any insight for Daniel? Sorry, no. I don't remember working with that particular bit of code. You could try digging through the commit logs. Thanks, /jakob > On Tue, Jul 23, 2013 at

Hi llvm developers, I might be overlooking something, but I think the ARMConstantIsland pass uses the wrong size for the MachineInstrs representing jump tables: Currently, there is the following calculation in doInitialJumpTablePlacement (lib/Target/ARM/ARMConstantIslandPass.cpp:588): ---------------------------------------------------------------------- unsigned Size = JT[JTI].MBBs.size() *