similar to: [LLVMdev] LLVM Back-End structur related question.

Displaying 20 results from an estimated 200 matches similar to: "[LLVMdev] LLVM Back-End structur related question."

2013 Feb 27
2
[LLVMdev] TargetMCAsmInfo.cpp Question
I'd like to set all Global Symbols to be prefixed with '_' ; however, when I set GlobalPrefix in TargetMCAsmInfo.cpp, this also applies to library calls (adds extra underscore which makes 3 so linkage failure), which I don't want. Thanks. -------------- next part -------------- An HTML attachment was scrubbed... URL:
2013 Feb 27
0
[LLVMdev] TargetMCAsmInfo.cpp Question
So GlobalPrefix is set to "_", which is fine but I want to exclude external library calls from that (I don't want the prefix on library routines), for example, something like __subsf3. What's the best way to do this? On Wed, Feb 27, 2013 at 11:05 AM, Ryan Taylor <ryta1203 at gmail.com> wrote: > I'd like to set all Global Symbols to be prefixed with '_' ;
2011 Jul 27
0
[LLVMdev] Avoiding load narrowing in DAGCombiner
On Wed, Jul 27, 2011 at 2:28 PM, Matt Johnson <johnso87 at crhc.illinois.edu> wrote: > Hi All, >     I'm writing a backend for a target which only supports 4-byte, > 4-byte-aligned loads and stores.  I custom-lower all {*EXT}LOAD and > STORE nodes in TargetISelLowering.cpp to take advantage of all alignment > information available to the backend, rather than treat each
2011 Jul 27
2
[LLVMdev] Avoiding load narrowing in DAGCombiner
Hi All, I'm writing a backend for a target which only supports 4-byte, 4-byte-aligned loads and stores. I custom-lower all {*EXT}LOAD and STORE nodes in TargetISelLowering.cpp to take advantage of all alignment information available to the backend, rather than treat each load and store conservatively, which takes O(10) instructions. My target's allowsUnalignedMemoryOperations()
2013 Aug 11
0
[LLVMdev] Address space extension
How about this as a solution. Add one hook into TargetInstrInfo, and one into TargetISelLowering. 1) getAddressSpaceRelation(unsigned AS1, unsigned AS2) - Returns either disjoint, subset, superset, equal. Function defaults to equal. 2) isAddressSpaceSupported(unsigned AS) - Returns true if supported, false otherwise. Function defaults to false for all non-zero AS. These could be used by IR
2013 Aug 11
2
[LLVMdev] Address space extension
On 08/11/2013 08:41 AM, Micah Villmow wrote: > How about this as a solution. > > Add one hook into TargetInstrInfo, and one into TargetISelLowering. > > 1) getAddressSpaceRelation(unsigned AS1, unsigned AS2) - Returns either disjoint, subset, superset, equal. Function defaults to equal. > 2) isAddressSpaceSupported(unsigned AS) - Returns true if supported, false otherwise.
2013 Aug 11
0
[LLVMdev] Address space extension
On Sun, Aug 11, 2013 at 5:49 AM, Michele Scandale < michele.scandale at gmail.com> wrote: > On 08/11/2013 08:41 AM, Micah Villmow wrote: > > How about this as a solution. > > > > Add one hook into TargetInstrInfo, and one into TargetISelLowering. > > > > 1) getAddressSpaceRelation(unsigned AS1, unsigned AS2) - Returns either > disjoint, subset, superset,
2011 Jul 27
2
[LLVMdev] Avoiding load narrowing in DAGCombiner
Hi Eli, On 07/27/2011 04:59 PM, Eli Friedman wrote: > On Wed, Jul 27, 2011 at 2:28 PM, Matt Johnson > <johnso87 at crhc.illinois.edu> wrote: >> Hi All, >> I'm writing a backend for a target which only supports 4-byte, >> 4-byte-aligned loads and stores. I custom-lower all {*EXT}LOAD and >> STORE nodes in TargetISelLowering.cpp to take advantage of
2011 Jul 27
0
[LLVMdev] Avoiding load narrowing in DAGCombiner
On Wed, Jul 27, 2011 at 3:50 PM, Matt Johnson <johnso87 at crhc.illinois.edu> wrote: > Hi Eli, > > On 07/27/2011 04:59 PM, Eli Friedman wrote: >> >> On Wed, Jul 27, 2011 at 2:28 PM, Matt Johnson >> <johnso87 at crhc.illinois.edu>  wrote: >>> >>> Hi All, >>>     I'm writing a backend for a target which only supports 4-byte,
2013 Aug 11
2
[LLVMdev] Address space extension
On 08/11/2013 10:38 PM, Justin Holewinski wrote: > On Sun, Aug 11, 2013 at 5:49 AM, Michele Scandale <michele.scandale at gmail.com > <mailto:michele.scandale at gmail.com>> wrote: > > On 08/11/2013 08:41 AM, Micah Villmow wrote: > > How about this as a solution. > > > > Add one hook into TargetInstrInfo, and one into TargetISelLowering.
2008 Jul 08
2
time series by calendar week
hello, i cant find a solution on this (might be) easy problem: i have a time serie by carlandar weeks, so for every carlendar week i have a value. now i would like to use the functions for time series, so i change structur to a time serie with cam <- ts(number,start=c(2001,1),deltat=7/365) or cam <- ts(number,start=c(2001,1),frequency=52) the problem on it is, that 2004 had 53 calendar
2002 Mar 14
1
documentation
Hi Perhaps I'm missing somthing, but i can't find the most interesting documentation (about MDCT trnasform and structur of packets). Maybe someone can show me the right location? bye <p>--- >8 ---- List archives: http://www.xiph.org/archives/ Ogg project homepage: http://www.xiph.org/ogg/ To unsubscribe from this list, send a message to 'vorbis-request@xiph.org'
2006 Jul 24
1
User defined covariate structure.
I am trying to use nlme but instead of using one of the ?identity? variance or covariance matrixes such as compsymm or ar1. Instead I want the covariance matrix to be represented in the following manor. Is it possible to define my own covariance matrix? I have search and found papers saying I can define my own covariance matrixes and own correlation structures. Said use corstruct but not sure
2005 Aug 31
1
Samba 3 problem with inheritation POSIX ACLs
Hi list, i'm using Samba 3.0.14a as standalone-pdc with posix-acl-features. On the fileserver i've mounted an ext3 partition to /home /dev/hdc2 /home type ext3 (rw,usrquota,acl) The following directory structur exists on /home /home +-/public_folder (exported per samba as \\fileserver\public ) | +-/a | +-/a_ann | | +-/anyfolder | | +- anyfiles | +-/a_bert | +-/a_sven | +-/a_eve |
2008 Dec 01
0
[LLVMdev] TargetISelLowering
On Dec 1, 2008, at 8:53 AM, Matthijs Kooijman wrote: > Hi All, > > when looking through all the existing targets, I see that each of > them defines > <Target>ISelLowering.{cpp,h} files. However, they define a class > called > "<Target>TargetLowering" (though the comments in [at least some of] > those > files stay the define
2008 Dec 01
2
[LLVMdev] TargetISelLowering
Hi All, when looking through all the existing targets, I see that each of them defines <Target>ISelLowering.{cpp,h} files. However, they define a class called "<Target>TargetLowering" (though the comments in [at least some of] those files stay the define "<Target>ISelLowering". I suspect that this class was renamed at some time (which makes sense, since I
2018 Jan 15
1
StripDeadDebugInfo for static inline functions.
+ Adrian + David Hi Arsen, This sounds like a bug to me. Have you tried reproducing it on trunk? For instance, I see that the relation between DICompileUnit and DISubprogram was changed in the meantime (https://reviews.llvm.org/D19034 <https://reviews.llvm.org/D19034>). If this no longer occurs on master you could bisect the compiler to find the commit(s) that fix this and consider
2018 Jan 12
2
StripDeadDebugInfo for static inline functions.
Hi Arsen, we are beyond what I understand about how metadata operates. Maybe Adrian or David knows. --paulr From: Arsen Hakobyan [mailto:hakobyan.ars at gmail.com] Sent: Friday, January 12, 2018 12:16 PM To: Robinson, Paul Cc: llvm-dev at lists.llvm.org; David Blaikie Subject: Re: [llvm-dev] StripDeadDebugInfo for static inline functions. Just one update: the function causing the segmentation
2018 Jan 14
0
StripDeadDebugInfo for static inline functions.
Thanks Paul, Hi Adrian and David I would really appreciate any comments, thoughts assumptions. If additional information is needed please let me know. Regards, Arsen On Sat, Jan 13, 2018 at 2:54 AM, Robinson, Paul <paul.robinson at sony.com> wrote: > Hi Arsen, we are beyond what I understand about how metadata operates. > Maybe Adrian or David knows. > > --paulr > >
2014 Jun 20
3
[LLVMdev] Passing specific register for an Instruction in target description files.
Hi all, I want to generate an assembly instruction for my target using target description representation of the instruction. The problem is that I want to add direct register to be chose as an output register for my target. Does it possible to do with an instruction definition in TARGETInstrInfo.td file? May be someone could help with an example? Currently I have seen that we can pass the name