similar to: [LLVMdev] Proposed patches for Clang 3.5.1

Displaying 20 results from an estimated 1200 matches similar to: "[LLVMdev] Proposed patches for Clang 3.5.1"

2014 Nov 24
4
[LLVMdev] Proposed patches for Clang 3.5.1
> -----Original Message----- > From: Tom Stellard [mailto:tom at stellard.net] > Sent: 24 November 2014 17:15 > To: Daniel Sanders > Cc: LLVM Developers Mailing List (llvmdev at cs.uiuc.edu) > Subject: Re: Proposed patches for Clang 3.5.1 > > On Mon, Nov 24, 2014 at 04:33:28PM +0000, Daniel Sanders wrote: > > Hi, > > > > I'd like to propose the
2014 Nov 25
3
[LLVMdev] Proposed patches for Clang 3.5.1
> > > > I'd also like to propose the inclusion of the recent ABI fixes to the Mips > > > > target but I'm not sure this is a good idea. I'm having difficulty sorting out the > > > > dependencies for these at the moment since they seem to depend on some > > > > of Eric Christopher's Subtarget/TargetMachine refactoring. It may also be a
2014 Nov 26
6
[LLVMdev] Proposed patches for Clang 3.5.1
On Wed, Nov 26, 2014 at 10:15:13AM +0000, Daniel Sanders wrote: > > From: Daniel Sanders > > Sent: 25 November 2014 17:39 > > To: Eric Christopher; Tom Stellard > > Cc: LLVM Developers Mailing List (llvmdev at cs.uiuc.edu) > > Subject: RE: [LLVMdev] Proposed patches for Clang 3.5.1 > > > > > > > > I'd also like to propose the inclusion of
2012 Jan 31
4
[LLVMdev] (MC) Register parsing for AsmParser (standalone assembler)
I'm trying to build a standalone assembler for Mips using AsmParser. Following the lead of X86, ARM and MBlaze I have run tblgen -gen-asm-matcher on Mips.td to produce tables and methods to aid the parser (MipsAsmParser.cpp) which is a stripped down ARM implementation. I am getting an assertion for what I believe are multiple register definitions with the same name. llvm-tblgen:
2012 Feb 02
0
[LLVMdev] (MC) Register parsing for AsmParser (standalone assembler)
On Jan 31, 2012, at 1:26 PM, Carter, Jack wrote: > I'm trying to build a standalone assembler for Mips using AsmParser. > > Following the lead of X86, ARM and MBlaze I have run tblgen -gen-asm-matcher on Mips.td to produce tables and methods to aid the parser (MipsAsmParser.cpp) which is a stripped down ARM implementation. > > I am getting an assertion for what I believe are
2012 Feb 03
0
[LLVMdev] (MC) Register parsing for AsmParser (standalone assembler)
Hi Jack, You're running into a fundamental problem with the current table generated asmmatcher. Specifically, wants to believe that assembly parsing is context insensitive, or at least close enough that operands can be parsed w/o knowing the context of the instruction. Its idea is to use the operand types to disambiguate which instruction should be selected. It sounds like MIPS 64vs.32 does
2013 Apr 09
0
[LLVMdev] Please document the layers
On Apr 8, 2013, at 2:55 PM, "Robinson, Paul" <Paul_Robinson at playstation.sony.com> wrote: I keep seeing "this is a layering violation" comments on the lists. > While there are a few llvm.org pages that mention layers in passing, > there is nothing (that I've found) actually specifying the layers. > Trying to infer the layering from the code is tedious and
2014 Jan 29
3
[LLVMdev] making emitInlineAsm protected
On 01/28/2014 06:29 PM, Eric Christopher wrote: > Uhhhh... > > -eric > > On Tue, Jan 28, 2014 at 4:56 PM, reed kotler <rkotler at mips.com> wrote: >> I would like to make the following member of AsmPrinter be protected >> >> >> void EmitInlineAsm(StringRef Str, const MDNode *LocMDNode = 0, >> InlineAsm::AsmDialect
2013 Apr 08
2
[LLVMdev] Please document the layers
I keep seeing "this is a layering violation" comments on the lists. While there are a few llvm.org pages that mention layers in passing, there is nothing (that I've found) actually specifying the layers. Trying to infer the layering from the code is tedious and error-prone (or we wouldn't see so many violations in code reviews, eh?). Now, I understand that Google has some sort
2014 Dec 12
9
[LLVMdev] 3.5.1 Testing Phase Begins
Hi, 3.5.1-rc1 has been tagged, so it is time to begin testing. We can always use more testers, so if you would like to volunteer, let me know. For those that are new to testing, please review the documentation for how validate a new release: http://llvm.org/docs/ReleaseProcess.html Remember that when we check for regressions we want to compare the test results of 3.5.1-rc1 with 3.5.0-final.
2014 Apr 03
5
[LLVMdev] comparing .o files from different build trees
I'm trying to write a script for checking whether the compiler recursed properly. rkotler at mipsswbrd002:~/slave/recurse3be/build$ find . -name "*.o" -exec cmp '{}' ../../recurse2be/build/'{}' \; |& tee foo.txt Is anyone else doing this? There 2 compilers, recurse 2 and recurse3 that in principle should be identical. Obviously if there is date and time
2012 Oct 08
1
[LLVMdev] Fwd: Multiply i8 operands promotes to i32
Hello Pedro, As others have said we're assuming that you're using Clang as the frontend, the MSP430TargetInfo class inside lib/Basic/Targets.cpp (clang codebase) set ints to be 16 bits wide, so you should get 16bit mults straight away without promotion. But anyways for 8bit multiplicantions you can do the following to bypass argument promotion: 1) go to the lib/CodeGen/TargetInfo.cpp
2015 Sep 23
4
The Trouble with Triples
> OK, I'm going to just reply to the last because I think it's the most important part of all this and would like to try to have us side tracked again. If you'd like I can reply to it, but let's take the last part first :) > > > > Could you please provide some examples of things that are impossible right now > > > with command lines, how those interact with
2015 Sep 23
2
The Trouble with Triples
Rewrote the ABI example in terms of clang -cc1as which is a supported tool. Note that the same problems exist and that they are unrelated to the existence of TargetMachine or not since TargetMachine gets the relevant information from the Triple it holds. This information is incorrect, even as a starting point. Please do read the other examples in my previous email. It contains a number of
2014 Nov 03
2
[LLVMdev] Mips's MicroMips ??
Hello Daniel, At the moment we are preparing the patch for disassembling microMIPS 16 bit instructions and it will be on Phabricator tomorrow or on Wednesday. Functionality is implemented in MipsDisassembler::getInstruction where first two bytes are read and decodeInstruction is called with DecoderTableMicroMips16 and only if it fails we read 4 bytes and call decodeInstruction with
2015 Sep 23
2
The Trouble with Triples
> > Note that the same problems exist and that they are unrelated to the existence > > of TargetMachine or not since TargetMachine gets the relevant information from > > the Triple it holds. This information is incorrect, even as a starting point. > > I believe we're going to disagree here as the TargetMachine does not get all of its > information from the Triple -
2015 Sep 23
4
The Trouble with Triples
> > The word 'all' is what still bothers me here. If any one piece of the information is derived from incorrect information in the triple, then the behaviour will likely be incorrect. > > If it's possible to be derived from the triple then it's going to be correct or the triple is incorrect. > If it's something that's overridden later because it can't be
2014 Jan 29
6
[LLVMdev] making emitInlineAsm protected
I would like to make the following member of AsmPrinter be protected void EmitInlineAsm(StringRef Str, const MDNode *LocMDNode = 0, InlineAsm::AsmDialect AsmDialect = InlineAsm::AD_ATT) const; I have some stubs that I want to emit in MipsAsmParser . Are there any objections to doing this? Reed
2015 Sep 24
3
The Trouble with Triples
> > > The word 'all' is what still bothers me here. If any one piece of the information is derived from incorrect information in the triple, then the behaviour will likely be incorrect. > > > > If it's possible to be derived from the triple then it's going to be correct or the triple is incorrect. > > If it's something that's overridden later
2014 Oct 29
2
[LLVMdev] Mips's MicroMips ??
Hi, We have this line in micromips-16-bit-instructions.s # CHECK-EB: addu16 $6, $17, $4 # encoding: [0x07,0x42] However, when I check this with llvm-mc, like below, I dont get back the assembly. This is against the latest LLVM code. What is wrong here? Thanks, Jun $ echo "0x07,0x42"|./Release+Asserts/bin/llvm-mc -disassemble -triple=mips -show-encoding -mattr=micromips