similar to: [LLVMdev] How to allocate redundant stack slot?

Hi, Is it possible to add a spill code (a pair of store /load ) to the machinecode in a pass before the instruction emitter? If so, how can I calculate the address (offset to the sp) for the spill store/load instructions? Thanks -------------- next part -------------- An HTML attachment was scrubbed... URL:

Hi Anton, Anton Korobeynikov wrote: > I don't see any huge problems with writing such pass: just create > stack frame objects at fixed offsets inside your MF pass - and you'll > done. The only problem is that you need to do this early - before > prologue / epilogue inserter code runs, since afterwards stack frame > layout is almostly finalized (at "high level")

Hello, I have a few general questions. 1. Whether the memory contents assigned for a function are accessible after we return from that function? If yes, how can we access it? 2. Does llvm delete the stackframe assigned for a specific function, after we return from that function? 3. If not, how can we delete the stackframe or clear the memory content after we return from the function? Where do

Hi Alok, Echoing Anton's statements, please provide a testcase! :) Apart from that, looking at your patch and description I actually think that it is estimateRSStackSizeLimit that is wrong. It is performing a check for a Thumb2 addressing mode whether the target has a FP register. That's the main check - for some reason it is appending another check AFI->hasStackFrame() which seems

Hi, I will soon be committing a change to MachineFrameInfo::CreateStackObject that removes the "bool MayNeedSP" parameter. This API change is part of larger patch that re-works stack layout passes to use analysis from the StackProtector pass to layout StackProtected objects (http://llvm-reviews.chandlerc.com/D2158). Out of tree targets will need to update their usage accordingly. The

The following problems happens with architectures, where stack alignment is smaller than the biggest preferred alignment for any data type SP pointer may point anywhere with alignment of stack alignment (4 in our case) SelectionDAGBuilder however calls CreateStackObject with preferred alignment is given data type(8 in our problemaric case. The ABI alignment for this data type is only 4) This

Hi, Nicolas > Could you point me where those hooks are in the llvm code? I didn't find > any. Look into PrologEpilogInserter.cpp::PEI::runOnMachineFunction(). There are calls to hooks inside TargetRegisterInfo: TargetRegisterInfo::processFunctionBeforeCalleeSavedScan() and TargetRegisterInfo::processFunctionBeforeFrameFinalized(). Maybe they are not so convenient when working via JIT

Attached is a patch to print asm comments for spill information. We've discussed the mechanisms before but I wanted to run the patch by everyone before I start to commit pieces. -Dave -------------- next part -------------- A non-text attachment was scrubbed... Name: spillcomments.patch Type: text/x-diff Size: 58930 bytes Desc: not available URL:

Hello Alok, > I fixed this by performing the CanEliminateFrame and > RegInfo->cannotEliminateFrame checks before the call to > estimateRSSStackSizeLimit, since these values are available before BigStack > is initialized. Does that sound reasonable? I’ve attached a patch with my > change. Will you please provide a testcase which reproduces the problem? Thanks! -- With best

Hello LLVMDev, I've encountered what looks like a bug in LLVM 2.9, it doesn't appear to be fixed in 3.0 either. The problem occurs in function ARMFrameLowering.cpp:processFunctionBeforeCalleeSavedScan. There's a circular dependency in setting the variable BigStack and AFI->setHashStackFrame(true). The expression which initializes BigStack calls estimateRSSStackSizeLimit which in

On Sep 11, 2009, at 3:31 PM, David Greene wrote: > Attached is a patch to print asm comments for spill information. > We've discussed the mechanisms before but I wanted to run the > patch by everyone before I start to commit pieces. Some thoughts: The general approach to enhancing CreateStackObject and adding MachineInstr::AsmPrinterFlags seems fine to me! The testcase should

Hello, after some time I'm trying to build my code with the current CVS of LLVM, and have a problem. The mentioned file, around line 184, contains: if (FixedSlot == FixedSpillSlots+NumFixedSpillSlots) { // Nope, just spill it anywhere convenient. FrameIdx = FFI->CreateStackObject(RegInfo->getSpillSize(Reg)/8,

Hi, I emailed about a week ago but did not get any response back This my second attempt. I understood that xm save -c (checkpointing feature) was included in Xen 3.1, but after taking days to have Xen running it seems that Xen 3.1 does not support VM (PVM or HVM) checkpointing. Is there any pseudo-stable version of Xen that supports checkpointing? cc

Dear all, I don't get how llvm handles functions with __attribute__((noreturn)). It seems that LR register is backed up on the stack whilst it will never be used to return from a 'noreturn' function. I have this problem with a home-made backend but it seems that ARM flavour of clang has same behaviour. By the way, SP is also saved, I don't understand why. Is there a syntax error

Hi llvmdev, I'm trying to figure how llvm remembers stack slots allotted to callee saved registers on x86. In particular, llvm pushes registers in decreasing order of FrameIdxs [1], so the offsets they get (as returned by MFI->getObjectOffset) don't directly correspond to their actual stack locations. In X86FrameLowering's emitCalleeSavedFrameMoves, when emitting DWARF

Hi, Is there any way you can save a xen domain without suspending it or stopping it? I want to set up something so if my xen session crashes I can fire up another xen session from the save file that I created 5 minutes before the crash and hopefully minimize downtime. Thanks -- ------------------------------ Christopher Vaughan

I would like to checkpoint some of my calculations in R, specifically those using optim. As far as I can tell, R doesn't have this facility, and there seems to have been little discussion of it. checkpointing is saving enough of the current state so that work can resume where things were left off if, to take my own example, the system crashes after 8 days of calculation. My thought is that

Hi All, I would like to know in order to support exception handling for particular target, what need to be done. After doing some investigation, I can think of the following items with questions: - CFI directives: This is for .eh_frame section. Basically all the targets insert CFI directives in FrameLowering, but I am not sure exactly when/where I should do so. -

Hi all, I've been working on a backend of our architecture and noticed llvm performs following combining although one of operands is FrameIndex. Combining: t114: i64 = add FrameIndex:i64<0>, Constant:i64<56> Creating new node: t121: i64 = or FrameIndex:i64<0>, Constant:i64<56> ... into: t121: i64 = or FrameIndex:i64<0>, Constant:i64<56> This

On my (out-of-tree) target I have 16 128-bit registers. Unaligned load/store are illegal. (must 16-bytes aligned) 8 of those registers are defined as callee-saved and 8 caller-saved. The default stack size is 4 bytes. The target implements dynamic stack realign to make sure the stack will always be aligned correctly when necessary. Yet I am still getting unaligned load/store when running this