similar to: [LLVMdev] eliminateFrameIndex

Hello all, For my custom processor backend I am trying add some instruction using BuildMI() inside eliminateFrameIndex(). I tried RegScavenger like this: unsigned RegUnused0 = RS->FindUnusedReg(&LASER::GNPRegsRegClass); if (!RegUnused0) RegUnused0 = RS->scavengeRegister(&LASER::GNPRegsRegClass, II, SPAdj); assert(RegUnused0 && "Register scavenger failed");

> Most architectures have a call instruction which does not push anything onto the stack; e.g. on ARM, the "BL" instruction saves the return address in LR. On other architectures, you can emulate this (for example, you could lower an IR "call" to LEA+JMP on x86-64). This is similar to what I was originally thinking, since the end goal of all of this is the following

On 1/29/15 2:00 PM, Steve King wrote: > Hello LLVM, > The ARM target sometimes adds an instruction with a virtual register > in eliminateFrameIndex(): > > https://github.com/llvm-mirror/llvm/blob/master/lib/Target/ARM/ARMBaseRegisterInfo.cpp > > This looks late for a virtual register to appear. Where is this vreg made real? The register scavenger should take care of such

Thanks Jon and Hal for the helpful pointers. By returning true from requiresRegisterScavenging() and requiresFrameIndexScavenging(), LLVM handled all the scavenging effort. That is nearly painless for the target, so why do some targets seem to do scavenging on their own? When the scavenged register is loaded with a simple immediate, is it safe to search the BB and replace other uses of the same

Hello LLVM, The ARM target sometimes adds an instruction with a virtual register in eliminateFrameIndex(): https://github.com/llvm-mirror/llvm/blob/master/lib/Target/ARM/ARMBaseRegisterInfo.cpp This looks late for a virtual register to appear. Where is this vreg made real? Thanks, -steve

I need to use ‘createVirtualRegister’ for a specific case in my ‘eliminateFrameIndex’ function implementation. However, whenever that code is executed, I get the assertion "MachineCopyPropagation should be run after register allocation!” at a later stage. I have seen that at least a couple of backend implementations (including ARM Thumb) create virtual registers in ‘eliminatedFrameIndex’.

----- Original Message ----- > From: "Steve King" <steve at metrokings.com> > To: jonathan at codesourcery.com > Cc: llvmdev at cs.uiuc.edu > Sent: Friday, January 30, 2015 10:52:19 AM > Subject: Re: [LLVMdev] creating a vreg in eliminateFrameIndex() > > Thanks Jon and Hal for the helpful pointers. By returning true from > requiresRegisterScavenging() and

(Sorry for the 2nd email Eli, I forgot to reply-all). > I'm not following how explicitly representing the return address of a call in the IR before isel actually solves any relevant issue. We already pass the return address implicitly as an argument to every call; you can retrieve it with llvm.returnaddress if you need it. Unfortunately the @llvm.returnaddress intrinsic does not solve

I ran into another issue with register scavenger. In my case, I don't need a place on the stack for an emergency spill slot. I have these free mips32 registers, that are not in general very useful for other things, for the emergency spill slot. I can move to and from mips16 (subset of mips32) registers and mips32 registers. I also have a situation where I need two free registers so then

You mean when I "explicity" use it by calling methods of register scavenger? Right now I'm just allocating virtual registers that will be resolved by the use of register scavenger and I'm also providing an override of the virtual method saveScavengerRegister. In Mips16, I have an extra mips 32 register (not usually very useful since it can only be used in a move instruction)

On Fri, Jan 30, 2015 at 8:59 AM, Hal Finkel <hfinkel at anl.gov> wrote: >> When the scavenged register is loaded with a simple immediate, is it >> safe to search the BB and replace other uses of the same immediate >> with the reg? In my case this gives a code size reduction. The >> search would stop on finding another use of the scavenged register. > > Are you

The docs for the above-mentioned function say: This method may modify or replace the specified instruction, as long as it keeps the iterator pointing the the finished product. What does it mean to "keep an interator". Was "invalidates the iterator" intended, so something else. Another question, is how do I really replace the instruction. The operator= is private

On Oct 10, 2011, at 10:26 AM, Richard Osborne wrote: > I'm investigating a bug associated with debug information that manifests > itself in the XCore backend (PR11105). I'd like to understand what the > expected behavior of eliminateFrameIndex() is when it is called on a > dbg_value machine instruction. That is up to the target. The TII::emitFrameIndexDebugValue() hook is

I'm investigating a bug associated with debug information that manifests itself in the XCore backend (PR11105). I'd like to understand what the expected behavior of eliminateFrameIndex() is when it is called on a dbg_value machine instruction. Currently the XCore target replaces the frame index with the frame register and sets the next operand to the byte offset from the frame

On 10/10/11 19:19, Jakob Stoklund Olesen wrote: > On Oct 10, 2011, at 10:26 AM, Richard Osborne wrote: >> I'm investigating a bug associated with debug information that manifests >> itself in the XCore backend (PR11105). I'd like to understand what the >> expected behavior of eliminateFrameIndex() is when it is called on a >> dbg_value machine instruction. >