similar to: [LLVMdev] How to translate library functions into LLVM IR bitcode?

Thanks for your reply, Yabin. Actually I'm trying to come up with a way to translate any source code into bitcode format. So some of them are not necessarily LLVM intrinsics. Also it seems like that dynamically loading the library by dlopen() is for loading object files, not .bc files. So it might not be useful for library in .bc files. Anyway, I've found a way to solve this by manually

Good tips. Although I have used llvm-link to merge .bc files together, I guess -flto could optimize the resultant .bc file further. As for the assembly, yes it is an issue. Anyway, I'll try to address those sources which are available for being translated into .bc first. Thanks for your advice, Tim. On Mon, Sep 15, 2014 at 2:55 PM, Tim Northover <t.p.northover at gmail.com> wrote:

Hi Johannes, By following your directions, I can use your script as is to produce the .bc file now. Here's my command line for compiling s_sin.c into s_sin.bc file and the output: command line: ~/Downloads/newlib-2.1.0/newlib/libm/mathfp » python ~/llvm_link.py s_sin.c -I../common/ -I../../libc/include/ -o s_sin.bc output: Initiate CLANG (/path-to-clang): Options: 's_sin.c

Hi Johannes, Actually, I'm working in the same scenario, i.e. configure + make of a benchmark/program/library like you said. I've got your point of using this script as a replacement to generate .bc files instead of a executable. That's truly helpful and has already answered my original question. Now I'm actually moving a step further. Take the same example in your reply, say, if

Hi Justin, In the PTX backend, "ret" instruction at the end of a ptx_kernel function is translated to "exit" instruction. A test case named exit.ll demos this. But in the NVPTX backend, it seems that you didn't do such a translation. Why do you choose this? Is this due to the changes of the NVIDA PTX itself? Thanks, Yabin -------------- next part -------------- An HTML

Hi all, How can I implement a multiple function return values scheme in a performance efficient way, just like what be done in Matlab or Octave? Thanks in advance, Yabin -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110531/5813e7a6/attachment.html>

Hello, I would like to submit two papers that use LLVM to the Related Publications section. Both papers focus on code isolation applied to perform piecewise compiler optimizations. The code isolation process is performed by CERE, an open source tool based on LLVM. The second paper is an extended version of the first one. 1) Piecewise Holistic Autotuning of Compiler and Runtime Parameters

Hello list, Did an update to the latest AMD drivers (11-9_vista64_win7_64_dd_ccc_ocl) and was pleasantly surprised to find that I can reboot my passthrough domU! Firstly, the reboot was triggered involuntarily shortly (20 seconds) AFTER the SUCCESSFUL driver update. The only thing logged was this: (XEN) io.c:194:d5 MMIO emulation failed @ 0010:fffff800036c7d00: 0f 28 04 10 0f 28

Dear Mihail, I've added these two publications to the publications page. Please review it and let me know if I need to make any changes. In particular, if you have URLs to use for the papers, having those would be greatly appreciated. Regards, John Criswell On 11/28/17 12:05 PM, Mihail Popov via llvm-dev wrote: > > Hello, > > I would like to submit two papers that use LLVM

Hi Yabin, Octave uses an octave_value_list object to return multiple values so I don't think it has anything to do with the compiler. A sample function that can be dynamically linked with Octave and called from octave interpreter: #include <octave/oct.h> DEFUN_DLD (divmult, args, nargout, "") { octave_value_list retval; // do some computation to compute r0 and r1

Hi LLVMers, The attached patch adds a new Intrinsic named "llvm.codegen" to support embedded LLVM IR code generation. **The 'llvm.codegen' intrinsic uses the LLVM back ends to generate code for embedded LLVM IR strings. The code generation target can be same or different to the one of the parent module. The original motivation inspiring us to add this intrinsic, is to

Hi all, Does PTX backend support llvm sitofp instruction? I failed to compile my llvm source when use llc -march=ptx32. The reason is that the source has a sitofp instruction. After i changed the instruction into uitofp manually, it passed. Thanks in advance, best, Yabin -------------- next part -------------- An HTML attachment was scrubbed... URL:

On Apr 29, 2012, at 6:37 AM, Tobias Grosser wrote: > > OK, I get what you mean. The intrinsic is currently targeted at the > OpenCL/CUDA model. It is the most widely used. Stuff like cell sounds > interesting, but probably needs further thoughts. Even with OpenCL/CUDA, > this intrinsic works currently only for PTX code generation, but I hope > we can gain support for other

Hi all, I am a phd student from Huazhong University of Sci&Tech, China. The following is my GSoC 2012 proposal. Comments are welcome! *Title: Automatic GPGPU Code Generation for LLVM* *Abstract* Very often, manually developing an GPGPU application is a time-consuming, complex, error-prone and iterative process. In this project, I propose to build an automatic GPGPU code generation framework

dear everyone system:windows XP R2.13.0 I download the windows binary from website and successfully install it ,because I use a proxy server ,when I follow the instrction as follows: I set a system property R_HOME=C:\Program Files\R\R-2.13.0 " R_HOME\bin\i386\Rgui.exe http_proxy=http://211.83.105.140:808/" error:: '\i' is an unrecognized escape in character string starting

Hi Evan, Thanks for your time. You're adding a feature that embed code inside a module. When the module is > loaded, is the string going to be verified? How are users of LLVM IR able > to ensure the embedded string is safe? I am not saying it cannot be done. > This feature just increases the risk and that again raises the bar for > acceptance. > I think the embedded string in

On Fri, Apr 27, 2012 at 7:40 PM, Yabin Hu <yabin.hwu at gmail.com> wrote: > Hi LLVMers, > > The attached patch adds a new Intrinsic named "llvm.codegen" to support > embedded LLVM IR code generation. **The 'llvm.codegen' intrinsic uses > the LLVM back ends to generate code for embedded LLVM IR strings. The code > generation target can be same or

On 04/03/2012 03:13 PM, Hongbin Zheng wrote: > Hi Yabin, > > Instead of compile the LLVM IR to PTX asm string in a ScopPass, you > can also the improve llc/lli or create new tools to support the code > generation for Heterogeneous platforms[1], i.e. generate code for more > than one target architecture at the same time. Something like this is > not very complicated and had

Hi Yabin, Instead of compile the LLVM IR to PTX asm string in a ScopPass, you can also the improve llc/lli or create new tools to support the code generation for Heterogeneous platforms[1], i.e. generate code for more than one target architecture at the same time. Something like this is not very complicated and had been implemented[2,3] by some people, but not available in LLVM mainstream.

Hi all， Clang use a hash table to store all its identifiers. The hash table definition is: typedef llvm::StringMap<IdentifierInfo*, llvm::BumpPtrAllocator> HashTableTy; HashTableTy HashTable; Can anyone explain the mechnism of handling the name string key collision for me? Is there a IdentifierInfo objects chain or list for variable or function with the same name? Thanks very much!