similar to: [LLVMdev] how to test the correct of the llvm backend

> On Dec 27, 2016, at 11:09 PM, liuyu11 at ict.ac.cn via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Hello,everyone: > I want to known how to let clang compile my local array to local variables: > I have the code : > int main() > { > int a[3]={1,2,3}; > > int b=7; > int c=8; > int d=9; > int e=10; > int f=11; >

Hi all, It's the first LLVM backend we do for our asynchronous DSP. So, I apologize if this is a trivial question! The target-independent DAG combiner performs the following transformation: sub n, c -> add n, -c For our target, negative constants are more costly to encode. What is the best place to revert to a sub instruction? Kind regards, -- Martin

A better way to handle this is to a td pattern to match "add n, -c" to a subtraction. I believe several targets do something similar to this. Evan On May 16, 2013, at 7:12 AM, Tom Stellard <tom at stellard.net> wrote: > On Thu, May 16, 2013 at 02:03:14AM +0000, Martin Filteau wrote: >> Hi all, >> >> It's the first LLVM backend we do for our asynchronous

On Thu, May 16, 2013 at 02:03:14AM +0000, Martin Filteau wrote: > Hi all, > > It's the first LLVM backend we do for our asynchronous DSP. So, I apologize if this is a trivial question! > > The target-independent DAG combiner performs the following transformation: > > sub n, c -> add n, -c > It looks to me like this transformation would happen

Hello,everyone: I want to known how to let clang compile my local array to local variables: I have the code : int main() { int a[3]={1,2,3}; int b=7; int c=8; int d=9; int e=10; int f=11; test(b,c,d,e,f,a); return 0; } I use clang command:clang --target=mipsel -emit-llvm -S a.c -o a.ll The a.ll is: @main.a = private unnamed_addr constant [3 x i32] [i32 1, i32 2, i32 3],

Subject: How to define vector element type bool in builtin function hello everyone,I have defined intrinsic function like this: def int_mips_add_32 : GCCBuiltin<"__builtin_dongxin_add_32">, Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty,llvm_v8i1_ty]>; Then I write a test code : typedef int v4i32 __attribute__ ((vector_size(16))); typedef bool v8i1

Help: How to define vector element type bool (v8i1) in C builtin function hello everyone,I have defined intrinsic function like this: def int_mips_add_32 : GCCBuiltin<"__builtin_dongxin_add_32">, Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty,llvm_v8i1_ty]>; Then I write a test code : typedef int v4i32 __attribute__ ((vector_size(16))); typedef bool v8i1

Hi, I'm currently testing SoftEcho, an echo cancellation software for Asterisk from Octasic. I noticed an important increase of the quality of my coms, but I still have a few echo problems. There is an ERL parameter which corresponds to an initial ERL value probably to optimize the echo training or something in that kind. Is there a way to monitor, using one of the zttools, the instant

On Wed, Jul 01, 2015 at 09:38:15AM -0700, Dan Liew wrote: > Hi Tom, > > I'd like to backport some fixes in LLVM trunk to the 3.6 branch. These > changes only effect the generation of CMake files and should not > change the generated binaries. The changes are > > r240981 > r241080 > > which need to be applied in order. > > Is this okay? > No, it is

> On Feb 11, 2015, at 11:37 AM, Tom Stellard <tom at stellard.net> wrote: > > On Wed, Feb 11, 2015 at 04:06:10PM +0000, Sam Kellett wrote: >> Would it be feasible to compile LLVM IR into shading language assembler? If >> so, is this already being done? >> > > The R600 backend does this in conjunction with the Open Source mesa3D > project:

Hi, I just read a pressrelease from VON that Digium will soon be releaseing a couple of new cards. What got me interested was: "The TE420P and TE415P support 128ms of G.168 (2002)-compliant echo cancellation across their entire 128 channels." Does anyone know when thease will be released and what they will cost when released? Thanks!

On Mon, Apr 09, 2012 at 09:37:37AM -0400, Tom Stellard wrote: > On Mon, Mar 26, 2012 at 12:50:07PM -0400, Tom Stellard wrote: > > Hi, > > > > We've been working on an LLVM backend for the previous generation of AMD > > GPUs (HD 2XXX - HD 6XXX) and we would like submit it for inclusion in the > > main LLVM tree. The latest code can be found in this git

Is there a version of the AMDIL back-end that is compatible with LLVM 3.0/3.1? On Tue, May 29, 2012 at 8:33 AM, Villmow, Micah <Micah.Villmow at amd.com>wrote: > > > > -----Original Message----- > > From: Stellard, Thomas > > Sent: Monday, May 28, 2012 9:07 AM > > To: Justin Holewinski > > Cc: Villmow, Micah; Tom Stellard; llvmdev at cs.uiuc.edu >

> -----Original Message----- > From: Stellard, Thomas > Sent: Monday, May 28, 2012 9:07 AM > To: Justin Holewinski > Cc: Villmow, Micah; Tom Stellard; llvmdev at cs.uiuc.edu > Subject: Re: [LLVMdev] RFC: R600, a new backend for AMD GPUs > > On Mon, May 28, 2012 at 08:54:41AM -0700, Justin Holewinski wrote: > > On May 28, 2012 6:44 AM, "Tom Stellard"

We're looking at using 4 or 8 port T1 cards with echo cancellation and are evaluating brands to go with. We know that Sangoma has excellent solutions especially when it comes to echo. But we still have to hear about actual performance of a Digium card using the same Octasic DSP echo canceller. Would appreciate hearing something on this. --------------------------------- Sponsored Link

On Mon, May 28, 2012 at 08:54:41AM -0700, Justin Holewinski wrote: > On May 28, 2012 6:44 AM, "Tom Stellard" <thomas.stellard at amd.com> wrote: > > > > On Fri, May 25, 2012 at 02:37:26PM -0700, Justin Holewinski wrote: > > > Hi Tom, > > > > > > I have a higher-level question regarding this back-end. If I have an > LLVM > > >

On May 28, 2012 6:44 AM, "Tom Stellard" <thomas.stellard at amd.com> wrote: > > On Fri, May 25, 2012 at 02:37:26PM -0700, Justin Holewinski wrote: > > Hi Tom, > > > > I have a higher-level question regarding this back-end. If I have an LLVM > > IR module and run it through this back-end, it seems like the only output > > option is a binary

Ok... I am reluctant to ask this question as I believe that it may be like asking what someones favorite linux distribution is... but I need to make an informed decision. We are getting ready to upgrade from a TE210P to a quad T1 card with echo cancellation. I am trying to decide between the Sangoma card and the Digium card. I need this to have great quality and I need it to work well. I would

Hi, I would like to assume code ownership of the R600 backend. Does anyone object? Thanks, Tom Stellard

On Mon, Mar 26, 2012 at 12:50:07PM -0400, Tom Stellard wrote: > Hi, > > We've been working on an LLVM backend for the previous generation of AMD > GPUs (HD 2XXX - HD 6XXX) and we would like submit it for inclusion in the > main LLVM tree. The latest code can be found in this git repository: > http://cgit.freedesktop.org/~tstellar/llvm/ in the r600-initial-review > branch