similar to: [LLVMdev] get unsigned integer pattern for ConstantFP

Displaying 20 results from an estimated 10000 matches similar to: "[LLVMdev] get unsigned integer pattern for ConstantFP"

2012 Feb 10
1
[LLVMdev] Prevent DAG combiner from changing "store ConstFP, addr" to integer store
This code lives in DAGCombiner.cpp: ------------- // Turn 'store float 1.0, Ptr' -> 'store int 0x12345678, Ptr' if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(Value)) { // NOTE: If the original store is volatile, this transform must not increase // the number of stores. For example, on x86-32 an f64 can be stored in one // processor operation but
2019 Sep 26
2
ConstantFP->getType() is not right
Hi, I want to create a double constant from a float constant, here's my code: auto* constFloat1 = static_cast<llvm::ConstantFP*>(llvm::ConstantFP::get(llvm::Type::getFloatTy(context), 3.1)); assert(constFloat1->getType() == llvm::Type::getFloatTy(context)); auto* constFloat2 = llvm::ConstantFP::get(llvm::Type::getDoubleTy(context), constFloat1->getValueAPF());
2018 Jan 19
2
computeKnownBits doesn't handle ISD::ConstantFP
SelectionDAG's computeKnownBits has no case for ConstantFP, e.g. Known.ones = cast <ConstantFPSDNode>(Op)->getValueAFP ().bitcastToAPInt (); I can't easily override this in target specific code. Can anyone see an issue with submitting the patch to upstream? Suggestions for an in tree target that could trigger this would be very welcome. Cheers -------------- next part
2015 Dec 02
4
lower 64 bits constant
Hi, All, I want to lower 64 Bits constant such as 'long' and 'double'. So I define them like this: def CONSTI64 : InstFOO<(outs GRWideRegs:$dst), (ins i64imm:$src), "const-long $dst, $src", [(set (i64 GRWideRegs:$dst), imm:$src)]>{ let isMoveImm = 1; } def CONSTF64 : InstFOO<(outs
2015 Jan 20
2
[LLVMdev] Bug in InsertElement constant propagation?
Does anybody else have an opinion on this issue? I'm planning to submit a patch which would add a new get method for ConstantDataVector taking an ArrayRef<Constant*> and use that in the few places in constant propagation where convertToFloat is used. Let me know if you think there is a more obvious way to do it. Right now the only way to create a ConstantDataVector are those method:
2008 Sep 25
3
[LLVMdev] Cannot Select ConstantFP on x86
I just ran into this today with x86-64: Cannot yet select: 0x3cbc180: f64 = ConstantFP <1> As far as I can tell, DAGCombiner comes along and sees an sint_to_fp of the constant 1 and hapilly folds it into a ConstantFP<1>. ISel then blows up because there's no pattern for it. Does this look familiar to anyone? I don't see any relevant bugs in the database.
2015 Jan 14
2
[LLVMdev] Bug in InsertElement constant propagation?
Hi, When I run opt on the following LLVM IR: define i32 @foo() { bb0: %0 = bitcast i32 2139171423 to float %1 = insertelement <1 x float> undef, float %0, i32 0 %2 = extractelement <1 x float> %1, i32 0 %3 = bitcast float %2 to i32 ret i32 %3 } -> It generates: define i32 @foo() { bb0: ret i32 2143365727 } While tracking the value I see that the floating point value
2014 Sep 19
2
[LLVMdev] More careful treatment of floating point exceptions
Hi Sanjay, Thanks, I saw this flag and it's definitely should be considered, but it appeared to me to be static characteristic of target platform. I'm not sure how appropriate it would be to change its value from a front-end. It says "Has", while optional flag would rather say "Uses" meaning that implementation cares about floating point exceptions. Regards, Sergey
2008 Sep 26
0
[LLVMdev] Cannot Select ConstantFP on x86
On Sep 24, 2008, at 5:11 PM, David Greene wrote: > I just ran into this today with x86-64: > > Cannot yet select: 0x3cbc180: f64 = ConstantFP <1> > > As far as I can tell, DAGCombiner comes along and sees an sint_to_fp > of the > constant 1 and hapilly folds it into a ConstantFP<1>. ISel then > blows up > because there's no pattern for it. > >
2012 May 11
2
[LLVMdev] [PATCH] OpenCL half support
I've got comments on the code change. The test cases look ok, but I haven't fully checked the math on the half-values. I checked with reference to trunk top-of-tree at revision 156617. I have not compiled the code. lib/AsmParser/LLLexer.cpp Adds support to parse format: 0xH<hexdigits> Tha 0xH format should be described in LangRef.html alongside 0xK<hex> and
2012 May 17
0
[LLVMdev] [PATCH] OpenCL half support
Hi David, Many thanks for the comments! > Tha 0xH format should be described in LangRef.html alongside > 0xK<hex> and 0xM<hex> Done. > Declaration of "int shiftcount" should be moved to smallest nesting > possible, right after "if ( const ConstantFP ..." at line 710 > > (The code makes a lot more sense with a good comment on the
2014 Jun 08
2
[LLVMdev] [llvm] r210424 - Revert "Do materialize for floating point"
Why are you reverting patches for any area that you have no authorization for ? No build was broken. This patch is fine. I am authorized to check in to the Mips area and Daniel is the maintainer for that area. On 06/08/2014 02:13 AM, Alp Toker wrote: > Author: alp > Date: Sun Jun 8 04:13:42 2014 > New Revision: 210424 > > URL:
2012 Apr 16
2
[LLVMdev] Representing -ffast-math at the IR level
Thanks for the updates! Minor comments: + if (!Accuracy) + // If it's not a floating point number then it must be 'fast'. + return HUGE_VALF; Can we add an assert instead of a comment? It's just as documenting and will catch any goofs. + // If it's not a floating point number then it must be 'fast'. + return !isa<ConstantFP>(MD->getOperand(0));
2011 Sep 15
1
[LLVMdev] LLVM ERROR: Cannot yet select: 0x1fcc5f0: f64 = ConstantFP<0.000000e+00> [ID=4]
1. My configuration: OS: ubuntu11.04, CPU: Intel(R) Core(TM) i5-2410M CPU @ 2.30GHz llvm: llvm-2.8 2. My running environment: ~#llvm-gcc -DCOMPDATE="today" -DCFLAGS="" -DHOSTNAME="thishost" -DNeedFunctionPrototypes=1 -DSASR -DPROBES=8 -O3 -emit-llvm /home/qali/Develop/Benchmark/MultipleSource/FreeBench/distray/distray.c -o
2012 May 17
3
[LLVMdev] [PATCH] OpenCL half support
looks good here. > -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] > On Behalf Of Anton Lokhmotov > Sent: Thursday, May 17, 2012 4:51 AM > To: 'David Neto' > Cc: llvmdev at cs.uiuc.edu > Subject: Re: [LLVMdev] [PATCH] OpenCL half support > > Hi David, > > Many thanks for the comments! > >
2007 Sep 05
0
[LLVMdev] Seeing a crash with ConstantFP::get
On Sep 5, 2007, at 2:21 PM, Chuck Rose III wrote: > Hola LLVMers, > > > > I’m getting a crash when using ConstantFP::get. > > > > I can repro it by adding one line to the Fibonacci example program: > > > > int main(int argc, char **argv) { > > int n = argc > 1 ? atol(argv[1]) : 24; > > > > // Create some module to put our function
2007 Sep 05
2
[LLVMdev] Seeing a crash with ConstantFP::get
Hola LLVMers, I'm getting a crash when using ConstantFP::get. I can repro it by adding one line to the Fibonacci example program: int main(int argc, char **argv) { int n = argc > 1 ? atol(argv[1]) : 24; // Create some module to put our function into it. Module *M = new Module("test"); // We are about to create the "fib" function: Function
2013 Jul 22
0
[LLVMdev] Inverse of ConstantFP::get and similar functions?
----- Original Message ----- > Hi, > > I noticed that ConstantFP::get automatically returns the > appropriately > types Constant depending on the LLVM type passed in (i.e. if called > with a vector, it returns a splat vector with the given constant). > > Is there any simple way to do the inverse of this function? i.e., > given a llvm::Value, check whether it is either
2007 Sep 06
0
[LLVMdev] Seeing a crash with ConstantFP::get
Hola Dale, I spent some time walking through what's going on with a friend of mine from VStudio. Category is given 2 bits in the APFloat class definition. It's sign extending the enum value for the comparisons when it loads it out of the class, so the 2 becomes a -2 and the comparison fails. He sent me a piece of code which I might be able to use to force the issue. I'll update
2007 Sep 05
2
[LLVMdev] Seeing a crash with ConstantFP::get
It's in debug. I'm having a look at the assembler it's producing right now and it's definitely a little odd for what should be a simple assignment in zeroSignificand. ________________________________ From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Dale Johannesen Sent: Wednesday, September 05, 2007 2:39 PM To: LLVM Developers Mailing