similar to: [LLVMdev] where is F7 opcode for TEST instruction on X86?

Displaying 10 results from an estimated 10 matches similar to: "[LLVMdev] where is F7 opcode for TEST instruction on X86?"

2018 Mar 28
1
Taking over an x86 opcode for my own instruction
tl;dr, I'd like to add my own instruction, but I'm running into problems due to my lack of x86 encoding/decoding understanding. Hello all. Currently, I'm working on adding my own x86 instruction. I have done this once before; the basic process I used was: 1. Find an unused opcode, e.g. 0xF1 in this table: http://ref.x86asm.net/coder32.html 2. Insert an instruction into
2004 Jul 23
2
retrieve rows from frame assuming criterion
Hi all, I have a data frame in which one column(PUNTAR) is of character type. What I want is to retrieve is the frame but only with those rows matching elements of PUNTAR with a list characters (e.g c("IX49","IX48") ) Year TUR STODNR PUNTAR 1994 9412 94020061 IX49 1994 9412 94020062 IX48 1994 9412 94020063 X32 1994 9412 94020065 X23 1994 9412
2012 Feb 25
3
[LLVMdev] Missed optimization on array initialization
Prompted by a SO post (http://stackoverflow.com/questions/9441882/compiler-instruction-reordering-optimizations-in-c-and-what-inhibits-them/9442363) I checked and found that LLVM yields the same (seemingly) suboptimal code as MSVC. Consider the following, simplified, C snippet: extern void bar(int*); void foo(int a) { int ar[100] = {a}; if (a) return; bar(ar); }
2004 Jul 23
0
retrieve rows from frame assuming criterion [corrected]
Still wrong: > x <- data.frame(a = sample(letters[1:3], 10, replace=T), b=1:10) > x a b 1 a 1 2 a 2 3 b 3 4 b 4 5 a 5 6 a 6 7 b 7 8 b 8 9 b 9 10 c 10 > subset(x, a == c("b", "c")) a b 3 b 3 7 b 7 9 b 9 10 c 10 > subset(x, a %in% c("b", "c")) a b 3 b 3 4 b 4 7 b 7 8 b 8 9 b 9 10 c 10 What matters
2004 Jul 23
1
R: retrieve rows from frame assuming criterion [corrected]
sorry for my previus (WRONG) answer, as someone already pointed out a solution could be subset(data, PUNTAR==c("IX49","IX48")) > -----Messaggio originale----- > Da: Guazzetti Stefano > Inviato: venerd?? 23 luglio 2004 15.55 > A: 'Luis Rideau Cruz'; r-help at stat.math.ethz.ch > Oggetto: R: [R] retrieve rows from frame assuming criterion > >
2013 Nov 16
1
[LLVMdev] Limit loop vectorizer to SSE
The vectorizer will now emit = load <8 x i32>, align #TargetAlignmentOfScalari32 where before it would emit = load <8 x i32> (which has the semantics of “= load <8 xi32>, align 0” which means the address is aligned with target abi alignment, see http://llvm.org/docs/LangRef.html#load-instruction). When the backend generates code for the former it will emit an unaligned move:
2013 Nov 16
0
[LLVMdev] Limit loop vectorizer to SSE
I confirm that r194876 fixes the issue, i.e. segfault not caused. My program still passed 16 byte aligned pointers to the function which the loop vectorizer processes successfully: LV: Vector loop of width 8 costs: 1. LV: Selecting VF = : 8. LV: Found a vectorizable loop (8) in func_orig.ll LV: Unroll Factor is 1 Since the program runs fine, it seems to be allowed for the CPU to issue a vector
2013 Nov 15
2
[LLVMdev] Limit loop vectorizer to SSE
A fix for this is in r194876. Thanks for reporting this! On Nov 15, 2013, at 3:49 PM, Joshua Klontz <josh.klontz at gmail.com> wrote: > Nadav, > > I believe aligned accesses to unaligned pointers is precisely the issue. Consider the function `add_u8S` before[1] and after[2] the loop vectorizer pass. There is no alignment assumption associated with %kernel_data prior to
2012 Nov 21
2
[LLVMdev] Python Backend
Hi, I have a version of the old CBackend which is working with the current trunk. I am in the progress of rewriting it into a new version but that project is not going as fast as I would hope as I have been distracted by other tasks with higher priority lately. Anyway, for those interested, I can provide patches, optionally separated into several parts (core, testing, misc). I am afraid that
2012 Nov 21
0
[LLVMdev] Python Backend
I'm very interested in this patch. Could you, Roel, upload it somewhere or maybe put your code to github or something simmilar? Additional - you're fixing it - could you please provide a little more information - what should I read to get more informations about writing not hardware but software backend in LLVM? (Of course the code analysis is one way, but maybe there is other also).