similar to: [LLVMdev] IfConversion non-recursive patch.

Hello, I have a few questions about applying the IfConversion pass to my out-of-tree target. (1) Is it true that the IfConversion pass may only run after register allocation? I often encounter this bad scenario, and I think it could be entirely avoided if IfConversion ran before register allocation: the block-to-be-predicated contains load-immediate (LI) instructions. The LI instructions

Hi All, How can I run the IfConversion pass in JIT to optimize my code for ARM as a Target Architecture? -- View this message in context: http://llvm.1065342.n5.nabble.com/Machine-level-IfConversion-for-ARM-tp69513.html Sent from the LLVM - Dev mailing list archive at Nabble.com.

Hello! The if-converter tries to match 'Simple' patterns looking like this: // Simple (split, no rejoin): // EBB // | \_ // | | // | TBB---> exit // | // FBB The IfConverter::ValidSimple method (lib/CodeGen/IfConversion.cpp:461) checks if TBB matches this pattern. It basically does this by simply checking if AnalyseBranch fails on

On Tue, Oct 10, 2017 at 4:48 PM, Friedman, Eli via llvm-dev < llvm-dev at lists.llvm.org> wrote: > On 10/9/2017 3:10 AM, Gaël Jobin via llvm-dev wrote: > > Hi all, > > I got a silly bug when compiling our project with the latest Clang. Here's > the outputted assembly: > > tst r3, #255 > strbeq r6, [r7] > ldreq r6, [r4, r6, lsl #2] > strne r6, [r7, #4]

Hi all, I am using llvm backend to generate binary for a specific accelerator. I would like to convert instructions into predicated form when instructions are still in SSA form. It looks like that ifconversion execution flow is different when instructions are in SSA form. However, I am encountering many problems (specially with registers) when I use it before register allocation. I was wondering

Hi, I am trying to implement support for an if-conversion pass in a backend for the ADRES CGRA architecture. >From studying the existing IfConversion pass, I observed the following: - The PredicateInstruction method is meant to insert guards into conditional instructions. - This method assumes that one will be able to get the predicate from the conditional branch instruction on which

I need to do some analysis, in which I have to selectively convert IFs. I am trying to find a way to call this optimization pass from the JIT code, thus I can decide which branches to convert and which to keep. Apparently I cannot do this using a pass manager. -- View this message in context: http://llvm.1065342.n5.nabble.com/Machine-level-IfConversion-for-ARM-tp69513p69622.html Sent from the

Assume an architecture that has multiple condition code registers, e.g., powerpc. Now assume that there are predicate instructions like thumb2, but can specify which condition code register they refer to. Now also assume that these predicate instructions themselves are predicatible, if executed they change the current predication state. Can LLVM handle multiple levels of predication? When is

On Tue, Jan 10, 2017 at 2:31 AM, Peter A Jonsson <pj at sics.se> wrote: > Hi Kyle, > > my apologies for mailing you directly but it seems new user creation is > disabled on the llvm bugzilla. > > We sometime lose edges during IfConversion of diamonds and it’s not > obvious how to reproduce on an upstream target. The documentation for > HasFallThrough says *may*

Hi all, I got a silly bug when compiling our project with the latest Clang. Here's the outputted assembly: > tst r3, #255 > strbeq r6, [r7] > ldreq r6, [r4, r6, lsl #2] > strne r6, [r7, #4] > ldr r6, [r4, r6, lsl #2] > bx r6 For the code to execute correctly, either the _ldr_ should be a _ldrne_ instruction or the _ldreq_ instruction should be removed. The error seems to

Hi, I'm working on a project that will generate RAM matrices at random. What I want to do is to be able to automatically identify if the model is non-recursive. For example, the following RAM matrix has a non-recursive loop (going from A to B to C to A): n.recursive <- data.frame(matrix(c("A", "B", 1, "B", "C", 1,

----- Original Message ----- From: "Chris Lattner" <sabre at nondot.org> To: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu> Sent: Tuesday, March 08, 2005 6:31 PM Subject: Re: [LLVMdev] Recursive Types using the llvm support library > On Tue, 8 Mar 2005, Vladimir Merzliakov wrote: > >>>> An example where something really simple like the

Hi, file.remove(path) will remove an empty directory "on most Unix platforms", but not on Windows, cf. help("file.remove"). A workaround for Windows is then unlink(path, recursive=TRUE). However, unless you're really careful and make sure 'path' is not empty, you may delete more than you wish (even worse, path may contain '..' or likewise from a

On Oct 3, 2012, at 12:22 AM, Journeyer J. Joh wrote: > Hi David Blaikie and others who might be interested on this > > Thank you very much! > > #1. Then I'd like to know, to make Clang/LLVM optimize a recursion > into an iteration, how a recursion has to be implemented with any > compiler option? (if the language is C/C++) Simple recursive algorithms are likely to be

3.0.0pre2: non-recursive remote listing breakage Looks like pre1's fix broke something else. I noticed this when listing module/directory contents on servers known to be running versions 2.5.7 & 2.6.3. Not having (full) access to them, I replicated the errors using 2 machines on my home lan. # the machines lithium.elements.lan: the client. rsync 3.0.0pre2 for all tests.

Hi, it seems to be generally a bad idea to enable vectorization of conditional stores on SystemZ, because it will cost extra instructions both to 1. extract compare result element 2. Do a test-under-mask instruction on that element 3. conditional branch past the store block. Ideally, I would like to adjust the cost for the vector compare. I am not sure if this is feasable since I would need

It would appear something snuck in that breaks non-recursive remote listings when talking to a non-3.0.0pre1 version of rsync. The symptom itself is simple enough to see; rather than displaying member directories/regular files/symlinks/etc as one would expect, only non-directories (with the exception of '.') are listed. Other tidbits.. some obvious, some maybe not: - not limited to just

Having tried out llvm I had to notice that the fibonacci example program hangs after short: > ./run fib 1 1 2 3 5 8 ^C For the next number it would be supposed to last twice as long as for 8. However it hangs forever instead. using llvm-2.5-0.pm.1.1.x86_64 Does not matter whether I compile it with gcc or interprete it with lli.

Hi all, There is a problem about how AliasSetTracker merging AliasSet's when meet UnknownInst. When adding new pointer it looks for existing AliasSet's aliased with new pointer. And merging them together. It is ok for pointers: if %A mayalias %B and %B mayalias %C then %A mayalias %C. But the same logic when adding callsite is wrong ( findAliasSetForUnknownInst). Callsite may be known

On 17 March 2017 at 16:34, Hal Finkel <hfinkel at anl.gov> wrote: > In general, this is true everywhere. In a large vectorized loop, this cost > may well be worthwhile. The idea is that the cost model should account for > all of these costs. If it doesn't properly, we should fix that. Isn't this only worth when the SIMD instructions can be conditionalised per lane? I