Displaying 20 results from an estimated 200 matches similar to: "[LLVMdev] ARM struct byval size > 64 triggers failure"
2013 Jun 20
1
[LLVMdev] ARM struct byval size > 64 triggers failure
> - "since ABI says the stack pointer needs to be 8 byte aligned at function entry point" (taken from Manman's reply)
> What will be considered as entry point here?
> Is it place of SP Adjustments "sub sp, sp, #16"
> (Or) Is it place of first user instruction(end of prologue) "ldr r2, .LCPI0_0"
Eight byte stack alignment is a
2013 Jun 18
0
[LLVMdev] ARM struct byval size > 64 triggers failure
Hi Rajesh,
The callee code looks okay to me
> Assembly for check114
> ---------------------------------------------------------------
> sub sp, sp, #16
> push {r11, lr}
> mov r11, sp
> sub sp, sp, #8
> str r3, [r11, #20]
> str r2, [r11, #16]
> str r1, [r11, #12]
> ldr r1,
2013 Jun 18
3
[LLVMdev] ARM struct byval size > 64 triggers failure
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2012 Oct 26
1
[LLVMdev] Properly handling mem-loc arguments when prologue adjusts FP.
For my target, I handle incoming memory arguments by creating a store to
memory (in LowerCall, [1]), then creating a fixed object on the stack and
loading from it (in LowerFormalArguments[2]). This approach was based on
MSP430.
I now have the problem that the resulting loads in my output assembly are
done assuming that the call stack looks something like:
------
MemArg
------
MemArg
------
2010 Jul 26
1
gapped sequence data summary
Id cat1 location item_values p-values sequence
a111 1 3002737 100 0.01 1
a112 1 3017821 102 0.05 2
a113 2 3027730 103 0.02 3
a114 2 3036220 104 0.04 4
a115 1 3053984 105 0.03 5
a118 1 3090500 106 0.02 8
a119 1 3103304 107 0.03 9
2010 Jul 28
1
error: arguments imply differing number
mydata <- read.table(textConnection("
Id cat1 location item_values p-values sequence
a111 1 3002737 100 0.01 1
a112 1 3017821 102 0.05 2
a113 2 3027730 103 0.02 3
a114 2 3036220 104 0.04 4
a115 1 3053984 105 0.03 5
a118 1 3090500 106 0.02 8
a119 1 3103304
2011 Sep 21
3
Reading data in lisp format
Hi,
I am trying to read the "credit.lisp" file of the Japanese credit database in UCI repository, but it is in lisp format which I do not know how to read. I have not found how to do that in the foreign library
http://archive.ics.uci.edu/ml/datasets/Japanese+Credit+Screening <http://archive.ics.uci.edu/ml/datasets/Japanese+Credit+Screening>
Could anyone help me?
Best
2011 Oct 29
0
[LLVMdev] [llvm-commits] [PATCH] BasicBlock Autovectorization Pass
On Sat, 2011-10-29 at 15:16 -0500, Hal Finkel wrote:
> On Sat, 2011-10-29 at 14:02 -0500, Hal Finkel wrote:
> > On Sat, 2011-10-29 at 12:30 -0500, Hal Finkel wrote:
> > > Ralf, et al.,
> > >
> > > Attached is the latest version of my autovectorization patch. llvmdev
> > > has been CC'd (as had been suggested to me); this e-mail contains
> >
2011 Oct 29
4
[LLVMdev] [llvm-commits] [PATCH] BasicBlock Autovectorization Pass
On Sat, 2011-10-29 at 14:02 -0500, Hal Finkel wrote:
> On Sat, 2011-10-29 at 12:30 -0500, Hal Finkel wrote:
> > Ralf, et al.,
> >
> > Attached is the latest version of my autovectorization patch. llvmdev
> > has been CC'd (as had been suggested to me); this e-mail contains
> > additional benchmark results.
> >
> > First, these are preliminary
2013 Jun 19
0
[LLVMdev] ARM struct byval size > 64 triggers failure
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2011 Oct 29
0
[LLVMdev] [llvm-commits] [PATCH] BasicBlock Autovectorization Pass
On Sat, 2011-10-29 at 12:30 -0500, Hal Finkel wrote:
> Ralf, et al.,
>
> Attached is the latest version of my autovectorization patch. llvmdev
> has been CC'd (as had been suggested to me); this e-mail contains
> additional benchmark results.
>
> First, these are preliminary results because I did not do the things
> necessary to make them real (explicitly quiet the
2011 Oct 29
4
[LLVMdev] [llvm-commits] [PATCH] BasicBlock Autovectorization Pass
Ralf, et al.,
Attached is the latest version of my autovectorization patch. llvmdev
has been CC'd (as had been suggested to me); this e-mail contains
additional benchmark results.
First, these are preliminary results because I did not do the things
necessary to make them real (explicitly quiet the machine, bind the
processes to one cpu, etc.). But they should be good enough for
discussion.
2008 Apr 21
0
[LLVMdev] RFC: PowerPC tail call optimization patch
On Apr 16, 2008, at 10:07 AM, Arnold Schwaighofer wrote:
> Hello Dale,
>
> this is an updated version of the tail call optimization patch for
> powerpc. could you have a look at it?
>
> i added code to support ppc64 (untested, will try to get access to
> ppc64 on a friend's machine).
> incorporated evan's formatting suggestions. ;)
>
> will run another round
2008 Apr 22
2
[LLVMdev] RFC: PowerPC tail call optimization patch
On Tue, Apr 22, 2008 at 12:30 AM, Evan Cheng <evan.cheng at apple.com> wrote:
> More nitpicks:
> ...
> No need for else here. :-)
Done
> SPDiff = (int)CallerMinReservedArea - (int)ParamSize;
>
> Just change last statement to
> int SPDiff = (int)...
Done
>
> +bool
> +PPCTargetLowering::IsEligibleForTailCallOptimization(SDOperand Call,
> +
2008 Apr 16
2
[LLVMdev] RFC: PowerPC tail call optimization patch
Hello Dale,
this is an updated version of the tail call optimization patch for
powerpc. could you have a look at it?
i added code to support ppc64 (untested, will try to get access to
ppc64 on a friend's machine).
incorporated evan's formatting suggestions. ;)
will run another round of testing (llvm-test) on my powerpc g4/800
when i get the okay to commit. testing on this machine takes
2017 Jun 13
13
[Bug 101404] New: GTX 970M (GM204-A) not powered off when not in use (DynPwr in stead of DynOff)
https://bugs.freedesktop.org/show_bug.cgi?id=101404
Bug ID: 101404
Summary: GTX 970M (GM204-A) not powered off when not in use
(DynPwr in stead of DynOff)
Product: xorg
Version: unspecified
Hardware: Other
OS: Linux (All)
Status: NEW
Severity: normal
Priority: medium
2008 Apr 22
0
[LLVMdev] RFC: PowerPC tail call optimization patch
On Apr 22, 2008, at 4:58 AM, Arnold Schwaighofer wrote:
> On Tue, Apr 22, 2008 at 12:30 AM, Evan Cheng <evan.cheng at apple.com>
> wrote:
>> More nitpicks:
>> ...
>> No need for else here. :-)
> Done
>> SPDiff = (int)CallerMinReservedArea - (int)ParamSize;
>>
>> Just change last statement to
>> int SPDiff = (int)...
> Done
>>
2014 Oct 18
3
[LLVMdev] Performance regression on ARM
Hi Chandler,
That's embarrassing how weird this part of clang is. I have a provisional
patch which fixes the problem but underlines clang's problems. I will
submit it tonight for comments.
суббота, 18 октября 2014 г. пользователь Chandler Carruth написал:
>
> On Fri, Oct 17, 2014 at 7:51 AM, Anton Korobeynikov <
> anton at korobeynikov.info
>
2017 Sep 11
2
Nouveau: kernel hang on Optimus+Intel+NVidia GeForce 1060m
Hi,
I have an Optimus-enabled laptop with a GTX 1060m. I never got it to fully
work with Nouveau even after Pascal support was added. I need to run the
kernel with nouveau.runpm=0 to get it to work. Unfortunately without proper
power mangement support, my laptop will run out of battery after about
1h30, so I'd love to get Optimus working.
What I can see is that when the extra GPU is not in
2010 Apr 15
4
Does "sink" stand for anything?
Hello Everyone,
Learning about R and its wonderful array of functions. If it's not obvious, I usually try to find out what a function stands for. I think this helps me remember better.
One function that has me stumped is "sink." Can anyone tell me if this stands for something?
Thanks,
Paul
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