similar to: [LLVMdev] MC X86 lacking support for hyphenated VIA Padlock instructions

On Wed, Jan 16, 2013 at 12:04:52PM -0500, Stephen Checkoway wrote: > > On Jan 16, 2013, at 10:07 AM, Brad Smith <brad at comstyle.com> wrote: > > > I was wondering if someone with more familiarity with MC > > on X86 could consider looking into adding support for > > the hyphenated versions of the VIA Padlock instructions? > > > Take a look at

On Jan 16, 2013, at 10:07 AM, Brad Smith <brad at comstyle.com> wrote: > I was wondering if someone with more familiarity with MC > on X86 could consider looking into adding support for > the hyphenated versions of the VIA Padlock instructions? Take a look at llvm/lib/Target/X86InstrSystem.td perhaps. -- Stephen Checkoway

I am new to the LLVM backends, I am wondering how instruction selection is done in LLVM backends, I looked at the .td files in Target/X86, they all seem to be small and do not deal with common X86 instructions, i.e. mov, push, pop, etc. Thanks -------------- next part -------------- An HTML attachment was scrubbed... URL:

Hi Tim, Tim Northover-2 wrote > The code used for DIV is around X86ISelDAGToDAG.cpp:2415, but from a > glance the key points seem to be: > 1. use the second result of getCopyToReg (i.e. SDValue(setIdNode, 1)) > in the RDMSR node. > 2. Give your RDMSR node type MVT::Glue instead of MVT::Other I tried doing what you said, and the DAG looks like how I think it supposed to look like

Hello, InstAlias does not allow tied operands (repeated operands) in the asm string to be matched. It seems this situation is explicitly prevented in AsmMatcherEmitter.cpp: if (!Hack) PrintFatalError(TheDef->getLoc(), "ERROR: matchable with tied operand '" + Tok + "' can never be matched!");

On Wed, Jul 10, 2013 at 12:29 PM, Ramkumar Ramachandra <artagnon at gmail.com> wrote: > The instructions btr and bts are perfectly valid, and have existed since > Intel 386. GNU as supports them fine. Unfortunately, LLVM does not > support them, and barfs with: > > error: ambiguous instructions require an explicit suffix > > Fix this problem by disambiguating it

Hi, On Instructions you can use checkEarlyTargetMatchPredicate() to check that the operands are the same. There's an example of that in MipsAsmParser.cpp for DATI and DAHI. I can't think of a reason TableGen couldn't be made to allow this for InstAlias too. > On 15 Dec 2017, at 02:12, via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Hello, > > InstAlias

Hi everyone, I want to ask if any of you has done a migration from a single storage to multiple back-end storages and what is the best strategy for folder hashing that you use. Using something like %H or %M how do you predict where the mail will end up in order to move the existing folders ? Thank you ! -- Best regards, Adrian Minta

Hi Jim, thank you for the quick response. I have used InstAlias in some cases, but these are really simple pseudo instructions where the pseudo instruction is more like a special case of existing one, like using fixed operand or simply a more human understandable way of presenting an operation. I know that there are predicates available to improve matching, but can InstAlias use conditions to

Hi all, I'm trying to solve a problem that we have in implementation of the assembler for Mips platform in llvm. Mips has some pseudo instructions that, depending on the arguments can be emitted as one or more real instructions by the assembler. For example load immediate instruction can have multiple expansions depending on a size of immediate operand: This expansion is for 0 ≤ j ≤ 65535. li

Hi Vladimir, The pass you refer to isn't used by the assembler at all. That's strictly a compiler codegen thing. The assembler equivalents are expressed via InstAlias constructions. Again, though, those are for a single output instruction, so you need something more. Sprecifically, you can handle assembly pseudo-instructions in C++ code. Something like the ARM assembler's

Thank you for your reply. One questionthough, if you add a mount point how do you know what user to move ? On 9/23/20 7:35 PM, Manuel Delgado wrote: > Hi Adrian, > > It depends much on your site configuration. > > In our case, we have several mount points and we distribute our user > mailboxes using username hash (%N)[1] and limit this hash to the > number of mount

Hi Daniel, I defined checkEarlyTargetMatchPredicate() to explicitly check for the tied operands, and it worked. I could define an alias like: InstAlias<"oldOP $rd, $rd, $rs1", (NEWOP $rd, $rs1)> However, I had to additionally change AsmMatcherEmitter 'Hack' variable setting to allow the repeated operand $rd in the AsmString. Do you or anyone else know the history

On Wednesday 10 July 2013 22:18:23 Jevin Sweval wrote: > http://www.cs.fsu.edu/~baker/devices/lxr/http/source/linux/arch/x86/include/ > asm/bitops.h#L68 > > Here is one example that I found. Are the inline assembly arguments > ambiguous in size? It would help us for sure to build the kernel and others. -- JS

Hi all, I'm working on llvm assembler support for Mips and for a while I'm trying to solve a problem regarding complex macro instructions. As mips assembler supports macro instructions that can develop to more then one real instruction depending on the operand type(usually two or three) we can't use InstAlias to exploit tableGen generated code. Currently we expand these in

On 11/6/2015 11:35 AM, Sky Flyer via llvm-dev wrote: > Guys, I stuck at this point. Could you please give me a hint how to > solve this problem without touching the LLVM backbone?! > Why LLVM doesn't let me define an instruction consisting of an operator > with no operand? Could you try it without the pattern? I.e. just this: class TestInst<string opc, string asmstr,

Hi all, I've come across an issue caused when I try to set the query parser's default op to OP_PHRASE: Xapian raises an Unimplemented Error if the query contains hyphenated words or other terms that implicitly generate a phrase. This can be shown with the following Python extract: >>> from xapian import * >>> qp = QueryParser() >>>

I am having a problem with any terms which contain hyphens in them. Is there a particular reason why this wouldn''t work? i''m using aaf, and have tried with the the previous version (pre 0.10.0) and the newest versions of both ferret and aaf. Basically, the problem is that term1-term2 is something my users want to search for, and it appears in the titles of publications,

Hello... I''m trying to generate and XML file using .rxml and I''m having a problem with element names that contain a hyphen. Here is a chunk of the .rxml file: xml.instruct! :xml, :version=>"1.0" xml.properties do @properties.each do |p| xml.property do xml.location do xml.street-address(p.street_address) xml.city-name(p.city) .. end end end

https://bugzilla.netfilter.org/show_bug.cgi?id=1454 Bug ID: 1454 Summary: nft list set omits timeout values for intervals formatted as hyphenated ranges Product: nftables Version: unspecified Hardware: x86_64 OS: Gentoo Status: NEW Severity: normal Priority: P5