similar to: [LLVMdev] Handling segmented instruction space in backend for custom target

Sean, I can create html, pdf and epub, then put them on <https://github.com/Jonathan2251/lbd/tree/gh-pages>. The uvbook example as below can click the pdf link and pop up a download window while I cannot. The uvbook link is put on http://username.github.com/... while the "make gh-pages" put them on https://github.com/username/...  How can I have the download link like uvbook

You may need a ".nojekyll" file. uvbook has one < https://github.com/nikhilm/uvbook/blob/gh-pages/.nojekyll>. Also see < https://help.github.com/articles/files-that-start-with-an-underscore-are-missing >. Let me know if that doesn't work. -- Sean Silva On Mon, Dec 3, 2012 at 9:15 PM, gamma_chen <gamma_chen at yahoo.com.tw> wrote: > Sean, > > I can

Sean, The `.. code-block:: bash` is work. Thank your information. Currently, I can put reStructuredText files on github. But, your example uvbook seems put the html and pdf on different github directory. Do you put html and pdf on github with version control? Jonathan On 2012/12/3, at 上午7:43, Sean Silva <silvas at purdue.edu> wrote: > It looks like things are going well. > >

Let me explain how uvbook does it. They use a feature of github called "github pages", which provides small static website hosting. The way that github pages works is that you make a git branch `gh-pages` which contains the generated HTML. They explain it better here <https://help.github.com/articles/creating-project-pages-manually>. You can see how uvbook does it by looking at

Hi Jonathan, sorry for the hijack. Can I help you writing the document? Regards, chenwj On Tue, Dec 04, 2012 at 10:15:33AM +0800, gamma_chen wrote: > Sean, > > I can create html, pdf and epub, then put them on > <https://github.com/Jonathan2251/lbd/tree/gh-pages>. > The uvbook example as below can click the pdf link and pop up a download window > while I cannot. The

Wei-Ren, Sorry, currently, I have an English helper in documentation. The cpu0 is my brother teaching material for college, and I did llvm backend compiler tutorial  for cpu0 since I didn't find a good tutorial in llvm backend design. As I know, there are many way to contribute back to open source or llvm. For example, write qemu for cpu0 is a extended work in cpu0 llvm backend design. Or

Sean, I am happy to introduce Anoushe, my llvm backend documentation work helper for English and edit. Is it possible, me and Anoushe can get a git free space and access right for the reStructuredText files (include .png pictures) of me and Anoushe create in future? If not allowed. Can we hand over the reStructuredText files, and put to git server through you? Best regards Jonathan

> I am happy to introduce Anoushe, my llvm backend documentation work helper for English and edit. Awesome! Great to see people helping out. Thank you both for working on this. > Is it possible, me and Anoushe can get a git free space and access right for the reStructuredText files (include .png pictures) of me and Anoushe create in future? If not allowed. Can we hand over the

Sean, By try, I seems realize the github.com is free for register. So, just ignore my last mail. Anoushe, You can register with email and get an account on https://github.com/ I have put the our document reStructuredText on git.hub.com. You can clone it without register. After you get an account and I add it to collaborators, then you can do check in with our project as follows,

Sean, I add the empty file .nojekyll to https://github.com/Jonathan2251/lbd/tree/gh-pages and do "make gh-pages" again. It's the same. I check the uvbook has the gh-pages as mine as follows, https://github.com/nikhilm/uvbook/tree/gh-pages https://github.com/Jonathan2251/lbd/tree/gh-pages In addition to gh-pages, uvbook has the the other web site on

On Mon, Dec 3, 2012 at 11:09 PM, gamma_chen <gamma_chen at yahoo.com.tw> wrote: > I add the empty file .nojekyll to https://github.com/Jonathan2251/lbd/tree/gh-pages and do "make gh-pages" again. It's the same. I check the uvbook has the gh-pages as mine as follows, The book looks really good at <http://jonathan2251.github.com/lbd/>! I think if you change the PDF

It looks like things are going well. One suggestion. Instead of using `.. literalinclude::` for displaying the terminal sessions, you can use `.. code-block:: bash` instead. The reason that uvbook uses `.. literalinclude` is that they are showing parts of real compilable programs. If you just want to show a snippet of code or terminal snippet, you can use `.. code-block::` and avoid having lots

I am working on an LLVM backend for the AVR architecture, and am having troubles working with the codegen layer, trying to get around the quirks of the binary encodings of the AVR ISR. There are several different families of AVR microcontrollers, each with a minimum 'core' instruction set. Each family builds upon (or removes) the core ISR with more instructions or different encodings. My

Here's an example using the gcc toolchain for embedded 32 bit RISC-V (my HiFive1 board): #include <stdio.h> int foo(int i){ if (i < 100){ printf("%d\n", i); } return i; } int main(){ foo(10); return 0; } After compiling to a .o with -O2 -march=RV32IC we get (just looking at foo) 00000000 <foo>: 0: 1141 addi sp,sp,-16

By the way, since this is an optional code relaxation, we can think about it later. The first thing I would do is to add RISC-V support to lld without code shrinking relaxations, which I believe is doable by at most a few hundreds lines of code. On Wed, Jul 12, 2017 at 3:21 AM, Rui Ueyama <ruiu at google.com> wrote: > On Tue, Jul 11, 2017 at 9:14 PM, Bruce Hoult via llvm-dev < >

MSIX spec requires that device can be operated with all vectors masked, by polling. So the following patchset (lightly tested) adds this ability: when driver reads ISR, the device recalls a pending notification, and returns pending status in the ISR register. The polling driver can operate as follows: - map all VQs and config to the same vector - poll ISR to get status - this also flushes VQ

MSIX spec requires that device can be operated with all vectors masked, by polling. So the following patchset (lightly tested) adds this ability: when driver reads ISR, the device recalls a pending notification, and returns pending status in the ISR register. The polling driver can operate as follows: - map all VQs and config to the same vector - poll ISR to get status - this also flushes VQ

Up front I apologize for the lengthy email. Since our patch was not accepted, Chris asked us to follow up with this issue on llvm-dev. For the sake of completeness, let me give a bit of background and the problems that we are facing. I tried to capture as much as possible here so Please do give us feedback. Don't take your stack for granted.... PIC16 has very poor pointer handling, hence

I'm trying to add support for inline assembly and I keep getting this error: <jal> "<inline asm>:1:2: error: invalid instruction" which is due to the fact that MatchInstructionImpl() returns Match_MnemonicFail. This function is tablegen'ed in XXXGenAsmMatcher.inc and for some reason it can't find JAL even though I can clearly see it in both MatchTable0[] and

Hi, Does lld support linker relaxation that may shrink code size? As far as I see lld seems to assume that the content of input sections to be fixed other than patching up relocations, but I believe some targets may benefit the extra optimization opportunity with relaxation. Specifically, I'm currently working on adding support for RISC-V in lld, and RISC-V heavily relies on linker relaxation