similar to: [LLVMdev] Multiply i8 operands promotes to i32

Displaying 20 results from an estimated 400 matches similar to: "[LLVMdev] Multiply i8 operands promotes to i32"

2012 Oct 08
0
[LLVMdev] Multiply i8 operands promotes to i32
On Mon, Oct 8, 2012 at 2:44 AM, Pedro Malagón <malagon at die.upm.es> wrote: > Hi, > > I am trying to complete the hardware multiplier option for MSP430 backend. > > As the hardware multiplier in most of the MSP430 devices is for i8 and > i16 operands, with i16 and i32 result, I am lowering MUL_i8 and MUL_I16. > However, the front-end promotes the i8 argument to i32,
2012 Oct 08
1
[LLVMdev] Multiply i8 operands promotes to i32
> At -O0, you don't. __mulsi3 is the obvious lowering, and you're doing > something wrong if your tools don't provide it. MSP430 is 16 bit target, so mulsi is a bit expensive there, mulhi / mulqi can be implemented via hardware multiplier. There are several problems wrt 16 bit support inside LLVM in general and msp430 in particular: 1. In some places LLVM expectes 32 bit or 64
2017 Oct 05
3
Bug 20871 -- is there a fix or work around?
Looks like I have run into the same issue reported in: https://bugs.llvm.org/show_bug.cgi?id=20871 Is there a fix or work-around for it? The bug report seems to be still open. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20171005/46c1282d/attachment.html>
2009 Apr 20
4
[LLVMdev] Unnecessary moves after sign-extension in 2-address target
My two-address target machine has sign-extension instructions to extend i8->i32 and i16->i32. When I compile this simple program: int sext (unsigned a, unsigned b, int c) { return (signed char) a + (signed short) b + c; } I get this IR: define i32 @sext(i32 %a, i32 %b, i32 %c) nounwind readnone { entry: %conv = trunc i32 %a to i8 ; <i8>
2010 Mar 17
2
[LLVMdev] llvm-gcc promotes i32 mul to i64 inside __muldi3
I'm building tool-chain for processor without integer MUL. So, I've defined __mulsi3 for integer multiplication (int32). Now I've got a problem with int64 multiplication which is implemented in libgcc2.c. Segfualt due to infinite recursion in i64 soft multiplication (libgcc2, __muldi3). LLVM-GCC (for my target) misoptimizes code if -O2 is passed. It promotes i32 multiplication to
2010 Mar 17
0
[LLVMdev] llvm-gcc promotes i32 mul to i64 inside __muldi3
> This shouldn't be necessary, IMO. If you were going to implement it, > then the correct thing to do would be to have generic selection dag > lowering of large multiplies, which renders the library mostly > useless. In fact, I would prefer to avoid custom lowering for operations on large types. i64 will be rare in my case (embedded) and their performance is not an issue. I need
2010 Mar 17
2
[LLVMdev] llvm-gcc promotes i32 mul to i64 inside __muldi3
On Wed, Mar 17, 2010 at 4:57 PM, Sergey Yakoushkin <sergey.yakoushkin at gmail.com> wrote: > Thanks, yes, I'm facing the same issue. > > Hm... seems there are no simple fixes. > I have to do one more i64 mul implementation to workaround aggressive > optimizations. > Is that correct? Is this the only way? This shouldn't be necessary, IMO. If you were going to
2010 Mar 17
0
[LLVMdev] llvm-gcc promotes i32 mul to i64 inside __muldi3
On Wed, Mar 17, 2010 at 1:32 PM, Sergey Yakoushkin <sergey.yakoushkin at gmail.com> wrote: > I'm building tool-chain for processor without integer MUL. > So, I've defined __mulsi3 for integer multiplication (int32). > > Now I've got a problem with int64 multiplication which is implemented > in libgcc2.c. > Segfualt due to infinite recursion in i64 soft
2012 Oct 08
1
[LLVMdev] Fwd: Multiply i8 operands promotes to i32
Hello Pedro, As others have said we're assuming that you're using Clang as the frontend, the MSP430TargetInfo class inside lib/Basic/Targets.cpp (clang codebase) set ints to be 16 bits wide, so you should get 16bit mults straight away without promotion. But anyways for 8bit multiplicantions you can do the following to bypass argument promotion: 1) go to the lib/CodeGen/TargetInfo.cpp
2011 Sep 08
1
[LLVMdev] [cfe-dev] Proposal: floating point accuracy metadata (OpenCL related)
On Thu, Sep 08, 2011 at 11:15:06AM -0500, Villmow, Micah wrote: > Peter, > Is there a way to make this flag globally available? Metadata can be fairly expensive to handle at each node when in many cases it is a global flag and not a per operation flag. There are two main reasons why I think we shouldn't go for global flags: 1) It becomes difficult if not impossible to correctly link
2015 Sep 30
2
InstCombine wrongful (?) optimization on BinOp with SameOperands
Hi all, I have been looking at the way LLVM optimizes code before forwarding it to the backend I develop for my company and while building define i32 @test_extract_subreg_func(i32 %x, i32 %y) #0 { entry: %conv = zext i32 %x to i64 %conv1 = zext i32 %y to i64 %mul = mul nuw i64 %conv1, %conv %shr = lshr i64 %mul, 32 %xor = xor i64 %shr, %mul %conv2 = trunc i64 %xor to i32
2012 Feb 28
1
[LLVMdev] How to vectorize a vector type cast?
Since Clang does not seem to allow type casts, such as uchar4 to float4, between vector types, it seems it is necessary to write them as element by element conversions, such as typedef float float4 __attribute__((ext_vector_type(4))); typedef unsigned char uchar4 __attribute__((ext_vector_type(4))); float4 to_float4(uchar4 in) { float4 out = {in.x, in.y, in.z, in.w}; return out; } Running
2019 Feb 19
2
AVR is little endian, but requires function arguments to be in a "big endian" order, might need an additional data layout variable unless someone can suggest a better fix?
I think this is broken in at least one place when legalising the DAG. This llvm ir: %3 = call { i16, i1 } @llvm.umul.with.overflow.i16(i16 %2, i16 11) Fails to lower correctly on AVR but the problem is, unfortunately, not just coming from the AVR Target code and I am not sure it can be cleanly fixed just there. (But I would be very happy to be proved wrong as I'm very new to this.) The above
2000 Jan 07
2
problems with compiling on SPARC solaris 2.7
ssh won't compile on this platform log: gcc -g -O2 -Wall -I/usr/local/ssl/include -DETCDIR=\"/usr/local/etc\" -DSSH_PROGRAM=\"/usr/local/bin/ssh\" -DSSH_ASKPASS_DEFAULT=\"/usr/local/libexec/ssh/ssh-askpass\" -DHAVE_CONFIG_H -c atomicio.c -o atomicio.o In file included from config.h:294, from bsd-misc.h:39, from includes.h:91,
1999 Dec 30
1
more problems with solaris 7?
configure appears to be setting things right: dragon:/var/src/openssh-1.2.1pre23> grep INTXX config.h #define HAVE_INTXX_T 1 /* #undef HAVE_U_INTXX_T */ #define HAVE_UINTXX_T 1 Marc G. Fournier marc.fournier at acadiau.ca Senior Systems Administrator Acadia University "These are my opinions, which are not necessarily shared
2011 Sep 08
0
[LLVMdev] [cfe-dev] Proposal: floating point accuracy metadata (OpenCL related)
Peter, Is there a way to make this flag globally available? Metadata can be fairly expensive to handle at each node when in many cases it is a global flag and not a per operation flag. > -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] > On Behalf Of Robert Quill > Sent: Thursday, September 08, 2011 3:24 AM > To: Peter
2016 Jul 27
2
Remove zext-unfolding from InstCombine
Hi Sanjay, thank you a lot for your answer. I understand that in your examples it is desirable that `foo` and `goo` are canonicalized to the same IR, i.e., something like `@goo`. However, I still have a few open questions, but please correct me in case I'm thinking in the wrong direction. > Am 21.07.2016 um 18:51 schrieb Sanjay Patel <spatel at rotateright.com>: > > I've
2010 Apr 16
6
[Bug 27680] New: Misaligned reg ... nVidia Corporation C67 [GeForce 7150M / nForce 630M] (rev a2)
https://bugs.freedesktop.org/show_bug.cgi?id=27680 Summary: Misaligned reg ... nVidia Corporation C67 [GeForce 7150M / nForce 630M] (rev a2) Product: xorg Version: git Platform: x86-64 (AMD64) OS/Version: Linux (All) Status: NEW Severity: major Priority: medium Component: Driver/nouveau
2004 Nov 23
0
Jumping to PXE boot from DOS
Hello all, I want to create a program that runs from a pxe-loaded virtual floppy (using memdisk + keeppxe) to call again PXE boot. I took a piece of code form NILO to look for PXE data structures and the call to function PXENV_START_BASE from PXE spec as follows: lower = (unsigned char *)LOWER_PXE_MEM; upper = (unsigned char *)UPPER_PXE_MEM; for (i=upper; i>lower;i--) { if
2006 Sep 29
1
samba in centos 4.4: samba-3.0.10-1.4E.9 versus the latest from sernet samba3-3.0.23c-30
Hi people. I use centos on many my servers and they are running samba which comes with centos: samba-3.0.10-1.4E.9 From samba-3.0.10 to 3.0.23c many thnigs in code had change. Many bug fixes etc., code rewrote (for example oplock in later version of samba than 3.0.10). RedHat people don't have made a full of backports to their samba, only security things. So I have question, what do