similar to: [LLVMdev] llvm::Triple error in new backend

Hi, I want to invoke the AddReadAttrs pass with my software backend (derived from TargetMachine like CBackend). CBackend uses addPassesToEmitWholeFile-method for invoking several passes. I tried to use the same method, but it failed on runtime. Running llc with my backend produces (mac os x 10.5 and llvm 2.4): dyld: lazy symbol binding failed: Symbol not found:

Hi, I'm developing a very basic new LLVM backend for a RISC machine (named Risco), based on the existing Sparc and Mips backends and the main tutorial [1]. I'm having trouble registering the backend so the main tools can see it. My project code is outside the source tree, and I've altered the Makefile to generate a shared library for the backend (libLLVMRiscoCodeGen.so). I've

Chris Lattner wrote: > Can you explain what goes wrong without the stub? It's the only part that > I didn't apply. The X86 backend doesn't get registered since there are no references to symbols in X86TargetMachine the object file is never pulled in from the library I create, and thus the static intializer for the RegisterTarget is never called...

I'm having a go at writing an LLVM backend for the WDC 65816. The documentation page on writing an LLVM backend<http://llvm.org/docs/WritingAnLLVMBackend.html>gives this example of target registration: extern "C" void LLVMInitializeSparcTargetInfo() { RegisterTarget<Triple::sparc, /*HasJIT=*/false> X(TheSparcTarget, "sparc",

tl;dr: is anyone opposed to making the interface to a TableGen backend be: void MyBackend(RecordKeeper &, raw_ostream & /* maybe some other args, per backend's needs */); ?? Currently, this is the "interface" for a TableGen backend: struct TableGenBackend { virtual void anchor(); virtual ~TableGenBackend() {} // run - All TableGen backends should implement the run

On Mon, 18 Oct 2004, Morten Ofstad wrote: > Chris Lattner wrote: > > Can you explain what goes wrong without the stub? It's the only part that > > I didn't apply. > > The X86 backend doesn't get registered since there are no references to > symbols in X86TargetMachine the object file is never pulled in from the > library I create, and thus the static

Hi there, I am doing relocation in my backend by calling my function getAddrNonPic: SDValue getAddrNonPIC(NodeTy *N, SDLoc DL, EVT Ty, SelectionDAG &DAG)const{ SValue Hi=getTarget(N,Ty,DAG, MyBackend::Hi16); SValue Lo=getTarget(N,Ty,DAG, MyBackend::Lo16); return DAG.getNode(ISD::ADD, DL, Ty, DAG.getNode(MyBackend::Hi16, DL, Ty, Hi), DAG.getNode(MyBackend::Lo16, DL, Ty, Ho)); }

Hi I'm doing a port of Clang/LLVM - purely for the educational value - to the MC6809 (and HD6309 as a dub target) processors. I'll also want to eventually provide direct support for the AM9511 floating-point coprocessor as an option. I'm working with bleeding-edge code from the Git mirror. I've made some pretty decent progress; I copied the llvm/lib/Targets/MSP430 Target to

Hi I have written a pass which creates some scheduling information. Its called MParSchedule. This pass works with opt. But when feeding it my experimental backend it seems to loose instructions and fails to work. I am loading this stuff as .so libraries under linux and i am using the amd64 version with a self compiled llvm-gcc. With this call it works: opt

On Mon, 18 Oct 2004, Morten Ofstad wrote: > To reduce the number of mails, I also include my next patch -- X86 > specific code and inline assembly for Visual C, unfortunately I had to > use the nasty IncludeFile trick again to get the linker to work.. I applied most of this here: http://mail.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20041018/019493.html Can you explain what goes

Paolo Invernizzi wrote: > There was a similar problem some time ago, and was resolved with alloca. > I think it's a better solution to use the stack instead of the heap... I tend to agree, but the constructors won't get called if it's an object array -- anyway, this particular case there was no objects, just pointers and bools so alloca should be fine. I'll leave it to

> Calling 0 is undefined behavior; the optimizer is within its rights to > remove this. Why do you want to call 0? For example, on embedded platforms you call 0 to do a soft reset. > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev

I am working on implementing break/continue and the flow control graphs that I am seeing are having all sorts of weird flow control that does not necessarily exist in the IR representation. For, example, a simple code segment that is a while loop w/ a continue ends up generating a CFG that is two while loops with one embedded inside each other. I've attached the dot files and the IR code. Any

Thank you for replying to me. As you recommended, I modified configure.ac in autoconf folder. But I’m not sure about how to regenerate configure. Sorry… I tried to follow the way introduced in README.TXT in the autoconf folder. It asks me to run autoupdate on all the m4 and configure.ac. And then it asks me to regenerate configure script with AutoRegen.sh. However, when I did that, I got an error

Chris Lattner wrote: >>>Can you explain what goes wrong without the stub? It's the only part that >>>I didn't apply. >> >>The X86 backend doesn't get registered since there are no references to >>symbols in X86TargetMachine the object file is never pulled in from the >>library I create, and thus the static intializer for the RegisterTarget

> You are the only one who response my problem. The others maybe don't > understand my questions....:( I'm also replying to the list. People are very nice and helpful! Plus, I am on vacation! :) > well....my questions are following. > 1. I wrote a very simple backend, but I dont know how to tell the llvm > compiler to use it. > I found something in "llc

Howdy: I'm a newbie of LLVM. I want to make sure that my way is correct. Plz tell me... we design a new processor with a new arch. we wanna get a compiler as fast as possible. The target code of the new compiler is machine code. So, is it I just to create a whole new backend for our new processor, right? And then???? Thx.

> On Sep 1, 2016, at 9:20 PM, Greg Parker <gparker at apple.com> wrote: > >> On Sep 1, 2016, at 9:06 PM, llvm.buildmaster at lab.llvm.org wrote: >> >> The Buildbot has detected a new failure on builder sanitizer-x86_64-linux-fast while building llvm. >> Full details are available at: >>

Hi all, llvm newbie here. I'm trying to learn porting with llvm for study purpose. This is my first query on llvm mailing list.I have some idea about GCC. I choose 'rx' as a target to port as it is also available in GCC. I have done some initial changes with llvm source code to register target with llvm. I need to verify these changes. Can anyone please take a chance to verify it.