similar to: [LLVMdev] FRem generates call 0 on windows 7 x64, msvc 2010 sp1 x86

Displaying 20 results from an estimated 1000 matches similar to: "[LLVMdev] FRem generates call 0 on windows 7 x64, msvc 2010 sp1 x86"

2012 Mar 31
1
[LLVMdev] llvm.exp.f32 didn't work
Hi, I found that llvm.exp.f32 didn't work but sqrt works well. I implemented a function like define inlinehint float "my_exp"(float %.value) { .body: %0 = call float @llvm.exp.f32(float %.value) ret float %0 } declare float @llvm.exp.f32(float) nounwind readonly But it generates following ASM: 00280072 movups xmm0,xmmword ptr [esp+8] 00280077 movss dword ptr
2018 Sep 25
2
Unsafe floating point operation (FDiv & FRem) in LoopVectorizer
Hi, Consider the following test case: int foo(float *A, float *B, float *C, int len, int VSMALL) { for (int i = 0; i < len; i++) if (C[i] > VSMALL) A[i] = B[i] / C[i]; } In this test the div operation is conditional but llvm is generating unconditional div for this case: vector.body: ; preds = %vector.body, %vector.ph %index = phi i64 [
2012 May 24
1
[LLVMdev] About the result of getPointerSizeInBits();
Hi guys, Does getPointerSizeInBits need to return sizeof(void*) in Platform? I found that getPointerSizeInBits return 8 in x86-32 on win7-64, MSVC 2010. And if I have a struct { i32, i32* }; the structLayout->getElementOffset(1) return 8, but I think 4 is right. In generated ASM, the offset of second element is 4. Thanks. -- Ye Wu CELL: +86 159 9957 0103 -------------- next part
2011 Nov 02
5
[LLVMdev] About JIT by LLVM 2.9 or later
Hello guys, Thanks for your help when you are busing. I am working on an open source project. It supports shader language and I want JIT feature, so LLVM is used. But now I find the ABI & Calling Convention did not co-work with MSVC. For example, following code I have: struct float4 { float x, y, z, w; }; struct float4x4 { float4 x, y, z, w; }; float4 fetch_vs( float4x4* mat
2011 Mar 27
0
Help labeling Panels
Hi, I'm new. I tried to search out this answer but I suspect I was using the wrong terms, or simply not understanding some of the answers. Anyway here is my question: I want to have a 2x2 panel figure with 4 line graphs all in the same scale. Actually I have that. The thing I seem to be lacking is a way to Label each panel with a letter. I want it to look something like this:
2015 Sep 14
2
[LLVMDev] Inconsistent result between GCC and Clang for __builtin_fmodf
Following simple program gives different answers when compiling with GCC (4.8.4) and ToT Clang: $ cat builtin_fmodf_bugpoint.cpp #include <cstdio> int main(int argc, char** argv) { const float a = 1.0f; const float b = 0.1f; printf("%f mod %f = %f\n", a, b, __builtin_fmodf(a, b)); return 0; } $ g++ -o builtin_fmodf_bugpoint_gcc builtin_fmodf_bugpoint.cpp $
2018 Feb 28
0
how to simplify FP ops with an undef operand?
I’m not sure the transformation happening with fdiv is correct. If we have “%y = fdiv float %x, undef” and %x is a NaN then the result will be NaN for any value of the undef, right? So if I understand the undef rules correctly (never a certainty) then we can’t safely replace the expression with undef. We could, I think, replace it with “%y = %x” though. I think the same is true for fadd, fsub,
2008 Mar 31
3
[LLVMdev] Reference Manual Clarifications
Here are some clarifications for the reference manual. Please verify that my assumptions are correct. Shall I post a patch? Floating-point Constants: Add "The assembler requires the exact decimal value of a floating-point constant. For example, the assembler accepts '1.25' but rejects '1.3' because '1.3' is a repeating decimal in binary." Binary
2018 Feb 28
0
how to simplify FP ops with an undef operand?
Why is NaN “just ‘undef’ in IR”? NaN is a specific value with well-defined behavior. I would think that unless the no-NaNs flag is used we need to preserve the behavior of NaNs. From: Sanjay Patel [mailto:spatel at rotateright.com] Sent: Wednesday, February 28, 2018 12:08 PM To: Kaylor, Andrew <andrew.kaylor at intel.com> Cc: llvm-dev <llvm-dev at lists.llvm.org>; Nuno Lopes
2007 Nov 27
3
[LLVMdev] Other Intrinsics?
> > Do you have plans to add other intrinsics? I'm curious as to why there > > is an llvm.sin intrinsic and an llvm.cos intrinsic, but no llvm.atan > > intrinsic. Why is there an llvm.pow intrinsic but no llvm.log > > intrinsic? > > Intrinsics get added on demand. Generally there has to be a good reason > to add them. llvm.sin was implemented (for
2018 Feb 28
2
how to simplify FP ops with an undef operand?
Yes, if %x is a NaN, we should expect that NaN is propagated. I'm still not sure what to do here. We can take comfort in knowing that whatever we do is likely an improvement over the current situation though. :) That's because the code in InstSimplify is inconsistent with the LangRef: http://llvm.org/docs/LangRef.html#undefined-values (UB for fdiv by 0?) ...and both of those are
2018 Feb 28
3
how to simplify FP ops with an undef operand?
%y = fadd float %x, undef Can we simplify this? Currently in IR, we do nothing for fadd/fsub/fmul. For fdiv/frem, we propagate undef. The code comment for fdiv/frem says: "the undef could be a snan" If that's correct, then shouldn't it be the same for fadd/fsub/fmul? But this can't be correct because we support targets that don't raise exceptions...and even targets
2007 Nov 27
0
[LLVMdev] Other Intrinsics?
On Tue, Nov 27, 2007 at 10:50:03AM -0700, Jon Sargeant wrote: > > > Do you have plans to add other intrinsics? I'm curious as to why there > > > is an llvm.sin intrinsic and an llvm.cos intrinsic, but no llvm.atan > > > intrinsic. Why is there an llvm.pow intrinsic but no llvm.log > > > intrinsic? > > > > Intrinsics get added on demand.
2007 Dec 20
1
[LLVMdev] Code Generation Problem llvm 1.9
I sent a long message yesterday describing a problem I thought had to do with the JIT stubs. After further investigating, the problem seems to be in the code generation. The following basic block seems to have an error in it's code generation: __exp.exit: ; preds = %codeRepl258, %__exp_bb_bb.exit phi double [ 1.000000e+00, %codeRepl258 ], [ %.reload.reload.i,
2018 Feb 28
0
how to simplify FP ops with an undef operand?
What I’m saying is that if we have one operand that is not an undef value then that operand might be NaN and if it is then the result must be NaN. So while it may be true that we don’t have a NaN, it is not true that we definitely do not have a NaN in the example. This is analogous to the example in the language reference where it says “%A = or %X, undef” -> “%A = undef” is unsafe because any
2018 Feb 28
2
how to simplify FP ops with an undef operand?
Correct - NaN is not undef in IR. But we don't have a NaN in this example. We have its moral equivalent in LLVM - an uninitialized value, undef. So we're not introducing any extra uncertainty by propagating the undef. The backend can choose whatever encoding of undef makes sense when lowering? And yes, I don't know why FP-div-by-zero would ever be UB. I think that text in the LangRef
2011 Nov 02
0
[LLVMdev] About JIT by LLVM 2.9 or later
空明流转 <wuye9036 at gmail.com> writes: > Could I wrap LLVM with mingw and expose some C api to called by MSVC? > > And in mingw, I will override the signature float4 foo( float44 ) to > float4* foo( float4*, float44* ); ? > > Is that OK? If you pass and return the structs through pointers, you don't need MinGW in the middle, you can use MSVC directly. Please note that
2011 Nov 02
0
[LLVMdev] About JIT by LLVM 2.9 or later
空明流转 <wuye9036 at gmail.com> writes: > Sorry, Still a quesiton, if return struct is 8 bytes, I remember it will > return by EAX:EDX and LLVM works on this condition? Sorry, I can't remember. My guess is "no", but I'm not sure. Maybe someone on the LLVM mailing list (CC'ed) knows. But it doesn't seem a good idea to implement something that will break as soon
2009 Apr 08
2
[LLVMdev] What is the state of LLVM's ARM backend
Duncan Sands skrev: > Hi Xerxes, > > >> 4. softfloat related errors >> http://labb.zafena.se/shark-testing/llvmARMCodeGenFailures200904/softenfloat_Do_not_know_how_to_soften_the_result_of_this_operator/ >> example: >> >> root at overo:/home/xerxes/llvm-test/fail/CodeGen/softenfloat# llvm-as < 2007-11-19-VectorSplitting.ll | llc >>
2007 Nov 27
2
[LLVMdev] Other Intrinsics?
On Tue, 27 Nov 2007, Dan Gohman wrote: >> > Intrinsics get added on demand. Generally there has to be a good reason >> > to add them. llvm.sin was implemented (for example) to allow generation >> > of code that uses vector sin operations. >> >> What is the criteria for adding an intrinsic or a built-in operation? >> For example, could the