Displaying 20 results from an estimated 20000 matches similar to: "[LLVMdev] Scalar replacement of arrays"
2012 Mar 07
0
[LLVMdev] Scalar replacement of arrays
On Wed, Mar 7, 2012 at 12:47 PM, Nicolas Capens
<nicolas.capens at gmail.com> wrote:
> Hi all,
>
> I'm implementing a virtual processor which features dynamic register
> indexing, and I'm struggling to make LLVM 3.0 produce good code for it.
> The register set is implemented as an LLVM array so it can be
> dynamically indexed using GEP. However, most of the time the
2012 Mar 09
1
[LLVMdev] Scalar replacement of arrays
Nicolas Capens wrote:
> [...]
> I'm not sure if that's going to help achieve optimal code
> for when the array is sometimes being dynamically indexed.
> Essentially there should be some kind of store to load copy
> propagation. As far as I know that's exactly what mem2reg
> does, except that it only considers scalars and not elements
> of arrays.
>
> So would
2011 Jul 01
0
[LLVMdev] How to prevent generation of wide integers in LLVM IR?
On 1 July 2011 13:35, Vasiliy Korchagin <vasiliy.korchagin at gmail.com> wrote:
> On 01.07.2011 12:03, Eli Friedman wrote:
>> On Fri, Jul 1, 2011 at 12:53 AM, Корчагин Василий
>> <vasiliy.korchagin at gmail.com> wrote:
>>> The problem is that C backend doesn't support integers wider than 64
>>> bits, but I need to use it on programs with wide
2011 Jul 01
2
[LLVMdev] How to prevent generation of wide integers in LLVM IR?
On 01.07.2011 12:03, Eli Friedman wrote:
> On Fri, Jul 1, 2011 at 12:53 AM, Корчагин Василий
> <vasiliy.korchagin at gmail.com> wrote:
>> Hello, LLVMdev.
>>
>> The problem is that C backend doesn't support integers wider than 64
>> bits, but I need to use it on programs with wide integers in LLVM IR. My
>> question is how to deny LLVM to generate wide
2011 Oct 26
2
[LLVMdev] Lowering to MMX
Hi Bill,
Comments inline:
On 24/10/2011 9:50 PM, Bill Wendling wrote:
> On Oct 20, 2011, at 8:42 AM, Nicolas Capens wrote:
>
>> Hi all,
>>
>> I'm working on a graphics project which uses LLVM for dynamic code
>> generation, and I noticed a major performance regression when upgrading
>> from LLVM 2.8 to 3.0-rc1 (LLVM 2.9 didn't support Win64 so I
2008 May 20
4
[LLVMdev] Optimization passes organization and tradeoffs
On May 20, 2008, at 8:57 AM, David Greene wrote:
> On Tuesday 20 May 2008 07:03, Nicolas Capens wrote:
>
>> 1) Does ScalarReplAggregates totally superscede
>> PromoteMemoryToRegister? I
>
> Nope, they are different. Mem2Reg is really important if you want
> register
> allocation.
Actually SROA does fully subsume Mem2Reg. It iterates between breaking
up
2009 Jan 25
0
[LLVMdev] -O4 limitations in llvm/llvm-gcc-4.2 2.5?
Jack Howarth wrote:
> I've had better luck compiling all of pymol 1.1r2 with
> -O4 on darwin9. Everythink links and there appears to be
> no regressions in the resulting code. I take it that LTO
> in llvm 2.5 is still limited to dead code elimination,
> correct?
No.
libLTO does the equivalent to opt -internalize -ipsccp -globalopt
-constmerge -deadargelim -instcombine
2011 Oct 26
0
[LLVMdev] Lowering to MMX
On Oct 26, 2011, at 1:18 PM, Nicolas Capens wrote:
> On 24/10/2011 9:50 PM, Bill Wendling wrote:
>> On Oct 20, 2011, at 8:42 AM, Nicolas Capens wrote:
>>
>>> Hi all,
>>>
>>> I'm working on a graphics project which uses LLVM for dynamic code
>>> generation, and I noticed a major performance regression when upgrading
>>> from LLVM
2011 Jun 19
0
[LLVMdev] Phase Interactions
On 19 June 2011 14:44, Suresh Purini <suresh.purini at gmail.com> wrote:
> I am doing few experiments to do understand optimization phase
> interactions. Here is a brief description of my experiements.
>
> 1. I picked the list of machine independent optimizations acting on
> llvm IR (those that are enabled at O3).
> 2. for each optimzation in the optimization-list
>
2009 Jan 25
2
[LLVMdev] -O4 limitations in llvm/llvm-gcc-4.2 2.5?
I've had better luck compiling all of pymol 1.1r2 with
-O4 on darwin9. Everythink links and there appears to be
no regressions in the resulting code. I take it that LTO
in llvm 2.5 is still limited to dead code elimination,
correct? Will LTO ever be extended to inlining across
files as well as constant-folding and global data
allocation optimizations? Or does the reliance on gcc-4.2
as the
2012 Mar 12
3
[LLVMdev] scalarrepl fails to promote array of vector
Hi Chris,
Thanks for your reply.
You said that scalarRepl gets shy about loads and stores of the entire
aggregate. Then I use a test case:
; ModuleID = 'test1.ll'
define i32 @fun(i32* nocapture %X, i32 %i) nounwind uwtable readonly {
%stackArray = alloca <4 x i32>
%XC = bitcast i32* %X to <4 x i32>*
%arrayVal = load <4 x i32>* %XC
store <4 x i32>
2012 Mar 12
0
[LLVMdev] scalarrepl fails to promote array of vector
Hi Fan,
> You said that scalarRepl gets shy about loads and stores of the entire
> aggregate. Then I use a test case:
>
> ; ModuleID = 'test1.ll'
> define i32 @fun(i32* nocapture %X, i32 %i) nounwind uwtable readonly {
> %stackArray = alloca <4 x i32>
> %XC = bitcast i32* %X to <4 x i32>*
> %arrayVal = load <4 x i32>* %XC
> store
2011 Jun 19
2
[LLVMdev] Phase Interactions
Dear all,
I am doing few experiments to do understand optimization phase
interactions. Here is a brief description of my experiements.
1. I picked the list of machine independent optimizations acting on
llvm IR (those that are enabled at O3).
2. for each optimzation in the optimization-list
a) Compiled the program using 'clang -c O0 -flto program.c'
b) opt
2009 Feb 02
1
[LLVMdev] Proposal: Debug information improvement - keep the line number with optimizations
Hi,
I've been thinking about how to keep the line number with the llvm
transform/Analysis passes.
Basically, I agree with Chris's notes (
http://www.nondot.org/sabre/LLVMNotes/DebugInfoImprovements.txt), and I
will follow his way to turn on the line number information when optimization
enabled.
Here is a detailed proposal:
1. Introduction
At the time of this writing, LLVM's
2008 May 21
0
[LLVMdev] Optimization passes organization and tradeoffs
Hi Chris,
Thanks for the detailed explanations. I have a few remaining questions:
Am I correct that ScalarReplAggregates is hardly more expensive than Mem2Reg
and therefore generally preferable?
What would be the code quality implications of using "-dce -simplifycfg"
instead of -adce? As far as I understand the algorithms involved, -dce would
hardly ever miss a dead instruction if
2012 Mar 10
0
[LLVMdev] scalarrepl fails to promote array of vector
On Mar 10, 2012, at 9:34 AM, Fan Dawei wrote:
> Hi all,
>
> I want to use scalarrepl pass to eliminate the allocation of mat_alloc which is of type [4 x <4 x float>] in the following program.
>
> $cat test.ll
>
> ; ModuleID = 'test.ll'
>
> define void @main(<4 x float>* %inArg, <4 x float>* %outArg, [4 x <4 x float>]* %constants)
2008 May 20
4
[LLVMdev] Optimization passes organization and tradeoffs
Hi all,
I'm getting more impressed by LLVM day by day, but what's a bit unclear to
me now is the order of optimization passes, and their performance. I think I
have a pretty solid understanding of what each pass does at a high level,
but I couldn't find any documentation about how they interact at a lower
level.
I'd like to use LLVM for generating high-performance stream
2007 Dec 08
0
[LLVMdev] Reproducing output of llvm-gcc using opt tool
On Dec 7, 2007, at 1:43 AM, Wojciech Matyjewicz wrote:
> Recently, I was looking into the bug #1227. I wanted to check if
> reordering optimization passes could solve it. To start with, I
> tried to
> reproduce the output of llvm-g++ -O3 using the combination of llvm-g++
> -O0 and opt with the appropriate passes. However, I was unable to. I
> use
> SVN versions of llvm and
2006 Mar 21
3
[LLVMdev] problem loading analysis results from Inliner pass
On 3/21/06, Chris Lattner <sabre at nondot.org> wrote:
> On Mon, 20 Mar 2006, Michael McCracken wrote:
>
> > Hi, I'm trying to access an analysis pass from the Inliner pass, and
> > I'm having a lot of trouble getting that to work - I can verify that
> > my pass is loaded and run (it is a dynamically loaded pass that is
> > part of an analysisgroup),
2012 Mar 10
2
[LLVMdev] scalarrepl fails to promote array of vector
Hi all,
I want to use scalarrepl pass to eliminate the allocation of mat_alloc
which is of type [4 x <4 x float>] in the following program.
$cat test.ll
; ModuleID = 'test.ll'
define void @main(<4 x float>* %inArg, <4 x float>* %outArg, [4 x <4 x
float>]* %constants) nounwind {
entry:
%inArg1 = load <4 x float>* %inArg
%mat_alloc = alloca [4 x <4 x