similar to: [LLVMdev] Problem with x86 32-bit debug information ?

Hi James, clang is able to generate correct debug informations for 64-bit target at -O2. My feeling, given some other experiments I've done, is that debug information generated for x86 32-bit might be broken for parameters as long as they are not 'homed' in the code (local copy to an automatic variable). It seems that when llvm.declare is turned into a llvm.value for parameter there

Hi James, I fully agree with you and understand your statement about -O2. Now some questions for you: Did you try to reproduce experiments described in my previous e-mail ? Did you look at debug informations generated for 'n' parameter on x86 32-bit & x86 64-bit ? I'm working on my own front-end for LLVM and I had difficulties with debug information when they are related to x86

On Wed, Mar 7, 2012 at 6:50 AM, Seb <babslachem at gmail.com> wrote: > Hi James, > > I fully agree with you and understand your statement about -O2. > > Now some questions for you: > Did you try to reproduce experiments described in my previous e-mail ? > Did you look at debug informations generated for 'n' parameter on x86 32-bit > & x86 64-bit ? >

Hi Pogo & James, Pogo, that is exactly the kind of answer I was expecting. Thanks for the time you spend on this problem. I myself did also some experimenst and found way to get what I'm expecting but I think that at least for x86 or any parameter passed on the stack for a different architecture the way LLVM handle debug information might be a problem. So here was the situation: My

When does echo 0 > /selinux/inforce need to be used? I.e., where is selinux enforcing itself on the system to protect it? When I do yum install of some package, it seems to work (not being blocked). When would doing something not work because selinux is watching it (or whatever that process is doing)? Thanks, -wes

Hi, I'm implementing the built_vector as an IMPLICIT_DEF followed by INSERT_SUBREGs. This approach is the one of the SPARC architecture. def : Pat<(build_vector (f32 fpimm:$a1), (f32 fpimm:$a2)), (INSERT_SUBREG(INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), (i32 (COPY_TO_REGCLASS (MOVSUTO_A_iSLo (bitcast_fpimm_to_i32 f32:$a1)), FPUaOffsetClass)), A_UNIT_PART),

On 4/12/2018 8:01 AM, Dominique Torette via llvm-dev wrote: > > But there is one small issue in the inference of RegisterClass of the > implicitly defined register. > > As shown below, the %vreg6<def> is implicitly defined as FPUabRegisterClass. > > This register class accepts the v2f32 type, but for others addressing > mode context this register should be

Hi all, Following command was working for me before: svn co http://llvm.org/svn/llvm-project/llvm/trunk llvm Now it fails as follows: svn: Server sent unexpected return value (500 Internal Server Error) in response to OPTIONS request for 'http://llvm.org/svn/llvm-project/llvm/trunk ' Any idea ? Best Regards Seb -------------- next part -------------- An HTML attachment was scrubbed...

I read enourmous comment about this questions stating that it was answered before.? I?have been looking for the answer for a week without luck !!!? I searched the archives the xts. vignitte , googled for an answer but couldn't find one so her it is: ? the Vignette states that xts "doesn't inforce the duplicate row requirement" but yet when I try to bring in tick stock data from

Hi, I'm new to wine, and am having a bit of trouble. I'm trying to run an EXE installer, which starts fine, prompts me for a few questions, and creates a few directories, but at a certain point it tries to run a vbs file, which fails. The attempt to run the .vbs file causes this message to appear in an alert window: "There is no Windows program configured to open this type of

Hello, The network administrators for the school I work for have recent left and also left the network in a rather large mess. There are files such as pictures being stored in random folders on random computers all around the network leaving valuable data vulnerable. I'm hoping to move over from the older windows system to a new linux based thin client configuration with ltsp. So far I am

On Mar 6, 2012, at 5:31 AM, Seb <babslachem at gmail.com> wrote: > Hi all, > > Anyone have ideas/info on this topic ? > Thanks > Seb > > 2012/3/2 Seb <babslachem at gmail.com> > Hi all, > > I'm using my own front-end to generate following code .ll file targeting x86 32-bit: > > ; ModuleID = 'check.c' > target datalayout =

Hi Jim, Thanks for the advice. Since I'm using LLVM 2.9 style of debug information. Will this code benefit from those improvement or should I generate LLVM 3.0 style of debug information ? Best Regards Seb 2012/3/6 Jim Grosbach <grosbach at apple.com> > > On Mar 6, 2012, at 5:31 AM, Seb <babslachem at gmail.com> wrote: > > Hi all, > > Anyone have ideas/info on

Function.cpp:167: error: call of overloaded `AddInteger(uint32_t&)' is ambiguous /home/Seb/llvm/include/llvm/ADT/FoldingSet.h:151: note: candidates are: void llv m::FoldingSetImpl::NodeID::AddInteger(int) /home/Seb/llvm/include/llvm/ADT/FoldingSet.h:152: note: void llvm::FoldingSetIm pl::NodeID::AddInteger(unsigned int) /home/Seb/llvm/include/llvm/ADT/FoldingSet.h:153: note: void

Hi James, Thanks for the answer, can you elaborate on difference between thumb, thumb2, ARM, thumbv7. I'm a bit lost right now. When specifying thumbv7 llc will generate thumb only code, not thumb2 ? Best Regards Seb > -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] > On Behalf Of James Molloy > Sent: Tuesday, May 29,

Hi Seb, > If I remove datalayout definition, code is not optimized and work as expected. > So my question is: > > What attribute/value/interpretation of data-layout would cause this type of bug? all kinds of optimizers use datalayout (and are disabled if there is none). For example, alias analysis, anything that needs to understand getelementptr offsets, the list is endless. I

Crossbow team, The following is of interest to the Crossbow project. Since a large chunk of these changes also exist in the Crossbow gate, the delivery of this wad will result in fewer lines of changes for Crossbow''s delivery. If someone on Crossbow could participate in this review, that would be a bonus (Eric Cheng made original changes in the Crossbow gate at some point last year).

Hi Seb, > Already done here : http://llvm.org/bugs/show_bug.cgi?id=12130 that doesn't describe the original issue (second store removed), it is talking about a different issue that appeared at -O1 (and it first seemed to explain your original problem; but now I think the -O1 transform was correct and does not explain your original problem). Ciao, Duncan. > > Thanks for your

Hi all, I was wondering if 'llc' is able to generate 'it' instruction for ARM Cortex-A9 target ? Thanks for your answers Seb

Hi all, I was wondering how I can get a list of ARM NEON intrinsics supported by LLVM. Is there any documentation about them or IntrinsicARM.td file is the only resource I can use ? Thanks for your answers Best Regards Seb -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20111107/fade76cc/attachment.html>