similar to: [LLVMdev] Question on test cases for direct object generation

Displaying 20 results from an estimated 10000 matches similar to: "[LLVMdev] Question on test cases for direct object generation"

2011 Dec 07
1
[LLVMdev] Question on test cases for direct object generation
On Dec 6, 2011, at 7:43 PM, Eli Friedman wrote: > On Tue, Dec 6, 2011 at 7:29 PM, Carter, Jack <jcarter at mips.com> wrote: >> Is there an official llvm method of creating and submitting test cases that >> don't affect .s assembly files? >> >> When we check in changes that can affect the .s output we submit .ll files >> with the internalized semicolon
2011 Dec 07
0
[LLVMdev] Question on test cases for direct object generation
On Tue, Dec 6, 2011 at 7:29 PM, Carter, Jack <jcarter at mips.com> wrote: > Is there an official llvm method of creating and submitting test cases that > don't affect .s assembly files? > > When we check in changes that can affect the .s output we submit .ll files > with the internalized semicolon instructions on how to check the output .s > file. > > For direct
2012 Oct 15
4
[LLVMdev] Using llvm-mc assembler in the llvm test-suite
Has anyone converted llvm/projects/test-suite to use the llvm assembler instead of gcc? If so, what was needed to change and how? My assumption is that this would be a good way to test the llvm assembler. Jack -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20121015/a91a495f/attachment.html>
2012 Jan 31
4
[LLVMdev] (MC) Register parsing for AsmParser (standalone assembler)
I'm trying to build a standalone assembler for Mips using AsmParser. Following the lead of X86, ARM and MBlaze I have run tblgen -gen-asm-matcher on Mips.td to produce tables and methods to aid the parser (MipsAsmParser.cpp) which is a stripped down ARM implementation. I am getting an assertion for what I believe are multiple register definitions with the same name. llvm-tblgen:
2012 Dec 14
2
[LLVMdev] [MC] [llvm-mc] Getting target specific information to <target>ELFObjectWriter
On Tue, Dec 11, 2012 at 2:48 PM, Carter, Jack <jcarter at mips.com> wrote: > Attached are the promised patches for the below proposed change. > Just a quick question from an initial review: isn't the int->bool mapping of flags a bit limiting. Flag can have actual values and not only be there or not be there. Wouldn't a more generic mapping (string->string ?) be more
2012 Oct 15
0
[LLVMdev] Using llvm-mc assembler in the llvm test-suite
On Mon, Oct 15, 2012 at 2:22 PM, Carter, Jack <jcarter at mips.com> wrote: > Has anyone converted llvm/projects/test-suite to use the llvm assembler > instead of gcc? > > If so, what was needed to change and how? > > My assumption is that this would be a good way to test the llvm assembler. > Not quite sure what you mean, as far as I know there isn't any assembler
2012 Dec 10
2
[LLVMdev] [MC] [llvm-mc] Getting target specific information to <target>ELFObjectWriter
Here are some examples using the gnu assembler reacting to the same input file with different commandline options. These are using the GCC assembler on hello.c // abi o32, arch mips32r2, relocation model pic+cpic mips-linux-gnu-as -mips32r2 -EL -KPIC -o hello_gas.o hello_gas.s e_flags 0x70001007 EF_MIPS_NOREORDER EF_MIPS_PIC EF_MIPS_CPIC E_MIPS_ABI_O32 EF_MIPS_ARCH_32R2 // abi
2012 Aug 09
2
[LLVMdev] Generic question about llc asserts
In my experience assertions are a development tool and should not be a part of the user's experience. With that in mind, do we expect the end user to ever invoke llc directly? The reason I ask is that I directly gave llc some bogus command line input and it asserted. Is it a bug that a graceful error message and exit from llc wasn't performed or is it considered "fair game" to
2012 Aug 27
2
[LLVMdev] Where are the regression tests for tools like llvm-objdump?
I've made a change to llvm-objdump and feel uncomfortable checking it in without a test case. Where do the "make check" tests for tools like llvm-objdump go? Worse comes to worse, I'll stick it in test/MC/Mips since it is there I need the change for other Mips/MC tests. Thanks, Jack -------------- next part -------------- An HTML attachment was scrubbed... URL:
2012 Oct 15
1
[LLVMdev] Using llvm-mc assembler in the llvm test-suite
Let me see if I understand the response ;-) When you are saying integrated assembler do you mean llc --filetype=obj? If so, we currently have that for an option when running the test-suite. When you say that to test the llvm-mc assembler for your target you don't substitute the gcc assembler invocation for llvm-mc which would expect the resultant executable run to pass. Instead you have to
2018 Feb 07
7
ThinLTO and linkonce_odr + unnamed_addr
Hi, I recently found that thinLTO doesn't deal with globals that has linkonce_odr and unnamed_addr (for macho at least) because it prohibits the autohide optimization during link time. In LLVM, we tagged a global linkonce_odr and unnamed_addr to indicate to the linker can hide them from symbol table if they were picked (aka, linkonce_odr_auto_hide linkage). It is very commonly used for some
2012 Jan 26
2
[LLVMdev] HELP - tblgen -gen-asm-matcher restrictions on .td content
I'm trying to generate MipsGenAsmMatcher.inc for MipsAsmParser.cpp. What added restrictions for the .td file contents are there for tblgen -gen-asm-matcher? For the Mips platform we create the following .inc files through tblgen. tablegen(LLVM MipsGenRegisterInfo.inc -gen-register-info) tablegen(LLVM MipsGenInstrInfo.inc -gen-instr-info) tablegen(LLVM MipsGenCodeEmitter.inc -gen-emitter)
2012 Jun 22
2
[LLVMdev] How to generate a non-fatal error from the backend
There are times that I want to generate an ERROR, but not stop processing of the code. An example of this would be when I find there is a value out of range for a specific operand. producing the error for all instances of this class of errors would be good. Also, I would like to have the error message have some relationship to the offending source. Thanks, Jack -------------- next part
2012 Oct 15
0
[LLVMdev] Using llvm-mc assembler in the llvm test-suite
Yes, absolutely. There's two pieces of this that are handy. First, checking the normal integrated-assembler code path. That doesn't check the actual assembler, but rather the binary encoder and object file emitter. To test that, I did runs with a locally modified clang that enabled the integrated assembler by default for my target (ARM/Darwin at the time). The second piece is checking the
2012 Dec 11
2
[LLVMdev] [MC] [llvm-mc] Getting target specific information to <target>ELFObjectWriter
Jim, You are correct: MipsSubtarget. For llvm-mc we have a straight MCSubtargetInfo object. For llc we get a MipsSubtarget object which derives from MipsGenSubtargetInfo which derives from TargetSubtargetInfo which derives from MCSubtargetInfo. The patch I hope to send out for review will do this: Add a new data member to MCSubtargetInfo base class. It will be a set of integers that is used or
2012 Feb 03
0
[LLVMdev] (MC) Register parsing for AsmParser (standalone assembler)
Hi Jack, You're running into a fundamental problem with the current table generated asmmatcher. Specifically, wants to believe that assembly parsing is context insensitive, or at least close enough that operands can be parsed w/o knowing the context of the instruction. Its idea is to use the operand types to disambiguate which instruction should be selected. It sounds like MIPS 64vs.32 does
2009 Jun 01
2
[LLVMdev] MachO writer test cases
Is anyone using the MachO Writer ? If so do you have any test cases as I am moving it over to use the prototype direct object emission code and I need test cases to verify it working correctly. Many thanks in advance, Aaron -------------- next part -------------- An HTML attachment was scrubbed... URL:
2012 Feb 03
0
[LLVMdev] HELP - tblgen -gen-asm-matcher restrictions on .td content
Hi Jack, On Jan 25, 2012, at 6:45 PM, "Carter, Jack" <jcarter at mips.com> wrote: > I'm trying to generate MipsGenAsmMatcher.inc for MipsAsmParser.cpp. > > What added restrictions for the .td file contents are there for tblgen -gen-asm-matcher? > Lots, as you're finding, almost all of them completely undocumented. :( > For the Mips platform we create
2018 Feb 07
0
ThinLTO and linkonce_odr + unnamed_addr
Hi Steven, I'd prefer not to inhibit importing. I am also concerned about putting these symbols in the llvm.compiler_used (I don't recall earlier discussion around this, but it seems like it could have effects on optimization as you mention). What are the downsides of #2 (adding visibility hidden)? We already do this when promoting internal linkage to external due to importing. I'm
2012 Dec 06
2
[LLVMdev] [MC] [llvm-mc] Getting target specific information to <target>ELFObjectWriter
Older targets like Mips had/have assemblers and ABIs that carry a lot of baggage. The small bit of baggage that is giving me fits is that MipsELFObjectWriter needs to know the relocation model (static,pic,cpic), whether we are using xgot (-mgot), which abi (old,new), which architecture (32r[123],64[123]), which if any coprocessor or extention instructions are used (mips16,micromips,etc.). I