Displaying 20 results from an estimated 2000 matches similar to: "[LLVMdev] Spills and values present in both registers & stack"
2011 Jul 28
0
[LLVMdev] Spills and values present in both registers & stack
On Tue, Jul 26, 2011 at 11:35 AM, Taral <taralx at gmail.com> wrote:
>
> One piece of code I'm writing has a lot of intermediates, and I'm
> trying to optimize down the number of memory accesses. Here's a
> snippet from the start of the function, where I think there is some
> low-hanging fruit:
>
> # BB#0:
> pushq %rbp
> pushq %r15
2011 Aug 02
0
[LLVMdev] clang: Manual unfolding doesn't match automatic unfolding
Here's the code and compilation steps:
#include <stdint.h>
typedef unsigned int uint128_t __attribute__((mode(TI)));
typedef struct{
uint64_t l[5];
} s;
void f(s * restrict r, const s * restrict x, const s * restrict y) {
uint128_t t[5] = {0, 0, 0, 0, 0};
#define BODY(i,j) { int i_ = i < j ? i : j; int j_ = i < j ? j :
i; uint128_t m = (uint128_t) x->l[i_] *
2011 Dec 26
1
Finding all triangles in a graph
I have the adjacency matrix of a graph. I'm trying to find all
triangles (embeddings of C_3). This doesn't work:
index = function(l) seq(l)[l]
pairs = do.call(rbind, lapply(seq(nrow(adj)), function(x) cbind(x,
index(adj[x,]))))
triangles = do.call(rbind, apply(pairs, 1, function(x) cbind(x,
index(adj[x[1],] & adj[x[2],]))))
I'm absolutely certain I've gone down the wrong path
2011 Dec 23
1
Help transforming a dist
I'd like to convert a dist into a table/matrix/thingy of the form:
A B value
A C value
B C value
(assuming the dist was over 3 names).
Is there a way to do this without using a for loop?
--
Taral <taralx at gmail.com>
"Please let me know if there's any further trouble I can give you."
? ? -- Unknown
2017 Oct 16
1
ROC curve for each fold in one plot
Hi all,
I have tried a 5 fold cross validation using caret package with random forest method on iris dataset as example. Then I need ROC curve for each fold:
> set.seed(1)
> train_control <- trainControl(method="cv", number=5,savePredictions = TRUE,classProbs = TRUE)
> output <- train(Species~., data=iris, trControl=train_control, method="rf")
>
2016 May 04
2
OrcLazyJIT for windows
Hi There,
I am currently exploring C++ JIT-compilation for a project where this would
be very useful. I started with the code from the lli tool which uses
OrcLazyJIT and changed it, such that the module is being compiled from c++
source in memory and OrcLazyJIT is used exclusively.
Now since I am on windows, I found that my application is crashing when
trying to run the main function from the
2016 May 04
2
OrcLazyJIT for windows
Hi David,
This is really cool. I'd love to get this in-tree.
There are two ways we could go about this:
(1) Make the OrcArchitecture interface ABI-aware so that it can choose the
right resolver code,
or
(2) Replace the OrcArchitecture classes with OrcABI classes. I.e. We'd just
a rename OrcX86_64 -> Orc_X86_64_SysV (and rename I386 & AArch64 similarly)
, then we add your code as
2012 Jul 26
2
[PATCH] x86-64: drop updating of UREGS_rip when converting sysenter to #GP
This was set to zero immediately before the #GP injection code, since
SYSENTER doesn''t really have a return address.
Reported-by: Ian Campbell <Ian.Campbell@citrix.com>
Furthermore, UREGS_cs and UREGS_rip don''t need to be written a second
time, as the PUSHes above already can/do take care of putting in place
the intended values.
Signed-off-by: Jan Beulich
2017 Oct 11
1
[PATCH v1 06/27] x86/entry/64: Adapt assembly for PIE support
Change the assembly code to use only relative references of symbols for the
kernel to be PIE compatible.
Position Independent Executable (PIE) support will allow to extended the
KASLR randomization range below the -2G memory limit.
Signed-off-by: Thomas Garnier <thgarnie at google.com>
---
arch/x86/entry/entry_64.S | 22 +++++++++++++++-------
1 file changed, 15 insertions(+), 7
2016 Jun 05
2
What kind of testcases should be required to test IPRA?
Hello Mehdi Amini,
Sorry for slow progress this week but it was due to interesting mistake of
mine. I had build llvm with ipra enable by default and that build files
were on my path ! Due to that next time I tried to build llvm it was
terribly slow (almost 1 hour for 10% build ). I spend to much time on
fixing this by playing around with environment variables, cmake options etc.
But I think this
2013 Sep 05
2
[LLVMdev] CFI Directives
Hi Rafael,
I've been staring at the CFI directives and have a question. Some background: I want to generate the compact unwind information using just the CFI directives. I *think* that this should be doable. The issue I'm facing right now is that I need to know how much the stack pointer was adjusted. So when I have something like this:
.cfi_startproc
Lfunc_begin175:
2013 Sep 06
0
[LLVMdev] CFI Directives
On 5 September 2013 19:27, Bill Wendling <wendling at apple.com> wrote:
> Hi Rafael,
>
> I've been staring at the CFI directives and have a question. Some background: I want to generate the compact unwind information using just the CFI directives. I *think* that this should be doable. The issue I'm facing right now is that I need to know how much the stack pointer was
2016 Jun 05
2
What kind of testcases should be required to test IPRA?
On Sun, Jun 5, 2016 at 8:56 AM, Mehdi Amini <mehdi.amini at apple.com> wrote:
>
> > On Jun 4, 2016, at 7:56 PM, vivek pandya <vivekvpandya at gmail.com> wrote:
> >
> > Hello Mehdi Amini,
> >
> > Sorry for slow progress this week but it was due to interesting mistake
> of mine. I had build llvm with ipra enable by default and that build files
>
2016 Jun 05
2
What kind of testcases should be required to test IPRA?
On Sun, Jun 5, 2016 at 9:15 AM, Mehdi Amini <mehdi.amini at apple.com> wrote:
>
> On Jun 4, 2016, at 8:32 PM, vivek pandya <vivekvpandya at gmail.com> wrote:
>
>
>
> On Sun, Jun 5, 2016 at 8:56 AM, Mehdi Amini <mehdi.amini at apple.com> wrote:
>
>>
>> > On Jun 4, 2016, at 7:56 PM, vivek pandya <vivekvpandya at gmail.com>
>> wrote:
2015 Jul 13
5
[LLVMdev] Poor register allocations vs gcc
Hello,
I have an issue with the llvm optimizations. I need to create object codes.
the -ON PURPOSE poor && useless- code :
---------------------------------------------------
#include <stdio.h>
#include <stdlib.h>
int ci(int a){
return 23;
}
int flop(int a, char ** c){
a += 71;
int b = 0;
if (a == 56){
b = 69;
b += ci(a);
}
puts("ok");
return a +
2012 Jan 27
2
[LLVMdev] Double spills with Greedy regalloc
Hello,
I noticed the following interesting code sequence while compiling a piece
of code with the backend I'm developing. Probably this issue is for Jakob,
but anyways this is what I'm getting:
STDWPtrQRr <fi#12>, 0, %R25R24; mem:ST2[FixedStack12](align=1)
STDWPtrQRr <fi#12>, 0, %R25R24; mem:ST2[FixedStack12](align=1)
STDWPtrQRr <fi#13>, 0, %R23R22;
2010 Sep 01
0
[LLVMdev] equivalent IR, different asm
On Sep 1, 2010, at 6:25 AM, Argyrios Kyrtzidis wrote:
> The attached .ll files seem equivalent, but the resulting asm from 'opt-fail.ll' causes a crash to webkit.
> I suspect the usage of registers is wrong, can someone take a look ?
The difference is that there is a shift right after the multiply, before the divide. In IR, the difference is:
%5 = mul nsw i32 %4, %tmp1
2013 Aug 08
0
[LLVMdev] Address space extension
On 8 Aug 2013, at 04:23, Pete Cooper <peter_cooper at apple.com> wrote:
>
> On Aug 7, 2013, at 7:23 PM, Michele Scandale <michele.scandale at gmail.com> wrote:
>
>> On 08/08/2013 03:52 AM, Pete Cooper wrote:
>>
>> From here I understand that in the IR there are addrspace(N) where N=0,1,2,3,... according to the target independent mapping done by the
2010 Sep 01
5
[LLVMdev] equivalent IR, different asm
The attached .ll files seem equivalent, but the resulting asm from 'opt-fail.ll' causes a crash to webkit.
I suspect the usage of registers is wrong, can someone take a look ?
$ llc opt-pass.ll -o -
.section __TEXT,__text,regular,pure_instructions
.globl __ZN7WebCore6kolos1ERiS0_PKNS_20RenderBoxModelObjectEPNS_10StyleImageE
.align 4, 0x90
2013 Aug 08
2
[LLVMdev] Address space extension
On 08/08/2013 11:04 AM, David Chisnall wrote:
> What happens when I link together two IR modules from different front ends that have different language-specific address spaces?
I agree with Micah: if during the linking two IR modules there are
incoherences (e.g. in module1 2 -> 1 and in module2 2 -> 3) then the
modules are incompatible and the link process should fail.
> I would be