similar to: [LLVMdev] Best location in code generation for insertion of instrumentation to measure stack depth?

I investigated the MachineFunctionPass (that is runOnMachineFunction, I believe). In my experimentation it didn't seem that the MachineFrameInfo was populated (it consistently said that the stack depth was 0, for example). I might have been doing something wrong? On Fri, Jul 8, 2011 at 5:21 PM, John Criswell <criswell at illinois.edu> wrote: > On 7/8/11 4:09 PM, Andrew Ruef wrote:

On 7/8/11 4:09 PM, Andrew Ruef wrote: > Hi list, > > I am trying to implement the technique outlined in the following > paper: http://www.cs.umd.edu/~mwh/papers/martin10ownership.html > <http://www.cs.umd.edu/%7Emwh/papers/martin10ownership.html> in LLVM. > My approach so far involves the use of an IR level transform (via > runOnFunction) to identify memory loads and

On 7/8/11 4:49 PM, Andrew Ruef wrote: > I investigated the MachineFunctionPass (that is runOnMachineFunction, > I believe). A MachineFunctionPass is a class that you inherit from to write a transform that operates on MachineInstrs (i.e., native code instructions generated from the LLVM IR instructions). The runOnMachineFunction() method is its entry point (i.e., the code generator

Hi, I am would like to ask few questions. I am trying to forecast hourly electricity prices by 24 hours ahead. I have hourly data starting from 2015*12*18 to 2017-10-24 and I have defined the data as time series as written in the code below. Then I am trying do neural network with 23 non-seasonal dummies and 1 seasonal dummy. But I don?t know whether training set is enough.( Guess it is 50

Is there a package to do the opposite of Samba? I.e. I want to use (mount) Win filesystems from a Unix client. -- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Rick von Richter Production Support Manager Voice: 858-831-2222 rickv@mwh.com Maintenance Warehouse/Home Depot Fax: 858-831-2221

I think there's a bug somewhere in TableGen for the X86 disassembler emitter. The following test: $ echo "0xF3 0xA5" | ./bin/llvm-mc -disassemble .section __TEXT,__text,regular,pure_instructions movsd (from llvm trunk) 0xF3 is the REP prefix, so the printed instruction should be 'rep movsd', however all that is printed is 'movsd'. It seems that there

Kelly Byrd <kbyrd at memcpy.com> writes: > Making progress on this PR. I have question about storing and checking > state in a subdriver > HID Power Devices can a "UPS.PowerSummary.CapacityMode" value. According to > the spec, the values are: > 0: maH > 1: mwH > 2: percent (%) > 3: Boolean support only (OK or failed) > > Grep'ing the source,

Hi, So, I run my pass in X86 target with llc command and it printed out "hello****". Now I am trying to do the same pass for ARM target. So I did exactly what I did for X86 as mentioned in my previous posts. When I run the following command: llc -march=arm test.ll -o test nothing prints out. I did the same for MIPS target too and I got no result. Can anyone tell me what I'm doing

You have the device side right. Devices have "UPS.PowerSummary.CapacityMode" (are the next three in %, mAh, or mWh? "UPS.PowerSummary.FullChargeCapacity" "UPS.PowerSummary.RemainingCapacity" "UPS.PowerSummary.RemainingCapacityLimit" "UPS.PowerSummary.WarningCapacityLimit" According to nut-names.txt, NUT has: battery.charge | Battery

Yes, I have done exactly the same. The wawanalyzer is the same. I changed ARM.h and ARMTargetMachine.cpp in the tager/arm folder. then I make tool/llc and lib folder. On Tue, Nov 17, 2015 at 10:55 AM, John Criswell <jtcriswel at gmail.com> wrote: > On 11/17/15 12:16 AM, fateme Hoseini via llvm-dev wrote: > > Hi, > So, I run my pass in X86 target with llc command and it printed

Dear John, Thank you so much for your help. I looked at those documents. Could you kindly answer the following questions: Does it mean that I have to make my own backend target in order to write a machine pass even if I want to run a simple machinefunction pass? for example,if I want my pass to get MIPS instructions as an input, I have to copy all the files from mips target and add a file to it

I tried llc -load /localhome/aggarwa4/llvm27/llvm-obj/projects/poolalloc/Debug/lib/libCodegen.so --help But this does not show my pass. It says it is an unknown command line argument. Arushi On Thu, May 12, 2011 at 11:21 AM, John Criswell <criswell at illinois.edu> wrote: > On 5/12/11 11:17 AM, Arushi Aggarwal wrote: >> >> What is the correct way to register/run a machine

I have the following code #################################################################### library(zoo) miedate <- yearmon((2006)+seq(0,23)/12) tab <- zoo(cbind(A = c(79.47, 89.13, 84.86, 75.68, 72.82, 78.87, 93.46, 78.18, 82.46, 77.25, 80.95, 84.39, 81.7, 74.76, 65.29, 60.3, 66.59, 73.19, 92.39, 65.76, 77.45, 74.22, 101.36, 100.01), B = c(77.95, 76.73, 51.2, 51.86, 51.29, 49.45,

Making progress on this PR. I have question about storing and checking state in a subdriver HID Power Devices can a "UPS.PowerSummary.CapacityMode" value. According to the spec, the values are: 0: maH 1: mwH 2: percent (%) 3: Boolean support only (OK or failed) Grep'ing the source, nothing makes use of this now (some subdrivers have it mapped to

Thank you so much. That helped alot. Fami On Wed, Nov 4, 2015 at 9:40 AM, John Criswell <jtcriswel at gmail.com> wrote: > On 11/3/15 7:54 PM, fateme Hoseini wrote: > > Dear John, > Thank you so much for your help. I looked at those documents. Could you > kindly answer the following questions: > > Does it mean that I have to make my own backend target in order to write

On 13 August 2012 12:02, Andrew Ruef <awruef at umd.edu> wrote: > I think there's a bug somewhere in TableGen for the X86 disassembler > emitter. The following test: > > $ echo "0xF3 0xA5" | ./bin/llvm-mc -disassemble > .section __TEXT,__text,regular,pure_instructions > movsd > > (from llvm trunk) > > 0xF3 is the REP prefix, so the

On 5/12/11 11:46 AM, Arushi Aggarwal wrote: > I tried > llc -load /localhome/aggarwa4/llvm27/llvm-obj/projects/poolalloc/Debug/lib/libCodegen.so > --help > > But this does not show my pass. It says it is an unknown command line argument. I'm assuming you've looked at other MachineFunctionPass'es and have registered yours in the same way that they do. I don't think

Evening, I was writing some code that tried to insert calls to the llvm.annotation intrinsic function, which has a signature of (i32, i8*, i8*, i32). The code is below. void addAnnotation( BasicBlock *block, Function *F) { string foo = "foo"; string bar = "barr"; Type *charTy = Type::getInt8Ty(block->getContext()); ArrayType *s1Ty =

Hi All, For various obscure reasons I'd like to detect the condition when X86 CALL instruction immediately precedes a function epilogue in the final emitted code, and insert a NOP between them if that happens. My initial attempt at it looked like this: MachineBasicBlock& MBB; MachineBasicBlock::iterator MBBI; <-- points to where the epilogue would be inserted if (MBBI != MBB.begin()

Hi everyone, I am a LLVM newbie. I need to write a machinefunction pass for my project. This should be an analyzer of the machine code to do some profiling. I have written a couple of function passes for front end, but it seems they are completely different. I searched through forum and llvm documents, but couldn't find anything useful or questions were unanswered. Can anyone reference me to