similar to: [LLVMdev] as: unrecognized option '-meabi=4'

Displaying 20 results from an estimated 600 matches similar to: "[LLVMdev] as: unrecognized option '-meabi=4'"

2011 Jul 08
1
[LLVMdev] as: unrecognized option '-meabi=4'
Hi In my install directory under bin , I had llvm-c++,llvm-g++,llvm-gconv I tested one sample program #llvm-c++ addu.c -o addu-arm as: unrecognized option '-meabi=4' How do i solve this issue Thanks Yuvi R On Fri, Jul 8, 2011 at 9:21 AM, raj raja <yuvaraj.addu at gmail.com> wrote: > Thanks for your reply > > I got error > > */bin/sh: build/genmodes: not
2011 Jul 07
0
[LLVMdev] llvm-gcc cross compiling for ARM
Here is how I do it on x86-64 machine running Ubuntu-11.04: 1. install flex and bison 2. download arm-2011.03 from www.codesourcery.com and add to path (setenv PATH ${PATH}:/home/dskhudia/projects/arm-2011.03/bin) 3. mkdir llvm-gcc-obj; cd llvm-gcc-obj 4. ../llvm-gcc-4.2-2.9.source/configure --target=arm-none-linux-gnueabi --program-prefix=llvm-
2011 Jul 07
3
[LLVMdev] llvm-gcc cross compiling for ARM
Hi I am trying to cross compile llvm-gcc front for ARM target Followed below steps #../llvm-gcc-4.2-2.9.source/configure --program-prefix=llvm- --enable-llvm=/home/yuvraj/llvm/llvm-2.9 --enable-languages=c,c++ --target=arm-none-linux-gnueabi # make I am getting some kind of linker errors /opt/arm-2010.09/bin/arm-none-linux-gnueabi-ld: cannot find crtn.o: No such file or directory @ final
2011 Jun 29
0
[LLVMdev] specint2000 as external tests
My source directory wasn't correct but now I have a correct test directory structure. $ls -1 ~/tmp/speccpu2000/benchspec/CINT2000/164.gzip/ data docs exe result run Spec src version I reconfigured the llvm with ../configure --prefix=/home/dskhudia/tmp/llvm-install --with-llvmgccdir=/home/dskhudia/tmp/llvm-install --with-externals=/home/dskhudia/tmp Now I can execute the make -C 164.gzip but
2011 Jun 30
0
[LLVMdev] specint 2000 with llvm as test-suite
Hi, Does anyone know how to fix the following error? I am compiling 254.gap as a part of test-suite with the following command in llvm-2.9/obj/projects/test-suite/External/SPEC/CINT2000. make -C 254.gap /home/dskhudia/tmp/llvm-2.9/obj/projects/test-suite/../../../projects/test-suite/RunToolSafely.sh 500 /home/dskhudia/tmp/llvm-2.9/obj/Release/bin/opt -std-compile-opts
2007 Jul 12
1
[LLVMdev] backend problem with LiveInterval::removeRange
Hi all, When compiling some programs using the Mips backend i'm getting this assert message on lib/CodeGen/LiveInterval.cpp:227: "Range is not entirely in interval!" I don't know yet if it's something that is missing on the backend code or why the range to be removed it outside the interval, does anyone have any clue? A more detailed output is attached. The program i tried
2011 Jun 29
3
[LLVMdev] specint2000 as external tests
Hi Duncan, Do you have sources also in the $LLVM_SRC_ROOT/projects/test-suite/External/SPEC/CINT2000/164.gzip? The following is content of above directory in my case. I have copied the CINT2000 sources in this directory manually. $ls -1 $LLVM_SRC_ROOT/projects/test-suite/External/SPEC/CINT2000/164.gzip 164.gzip.reference_output 164.gzip.reference_output.small compile_info compile_parms
2011 Jul 06
0
[LLVMdev] code generation removes duplicated instructions
On 6 July 2011 14:55, D S Khudia <daya.khudia at gmail.com> wrote: > The following is an example code generation for arm and x86 for a same IR > BB. In the x86 code I can see that the same computation is done twice and > result is stored in two different registers and then these two different > registers are used for comparision. Yes, but you shouldn't rely on it, since the
2011 Jul 06
0
[LLVMdev] code generation removes duplicated instructions
On 6 July 2011 02:31, D S Khudia <daya.khudia at gmail.com> wrote: >   %0 = load i32* %i, align 4 >   %HV14_ = getelementptr inbounds [100 x i32]* %a, i32 0, i32 %0 >   %1 = getelementptr inbounds [100 x i32]* %a, i32 0, i32 %0 >   %HVCmp7 = icmp ne i32* %1, %HV14_ >   br i1 %HVCmp7, label %relExit, label %bb.split > > So that HV14_ is a new instruction and I am
2011 Jul 06
0
[LLVMdev] code generation removes duplicated instructions
On 6 July 2011 15:57, D S Khudia <daya.khudia at gmail.com> wrote: > Since I am inserting a new basic block (contains printf statement and > program exit) which is jumped upon based on the result of > the comparison, the compiler cannot/shouldnot optimize that away by means of > DCE or anything else. It most certainly can, since the comparison yields always the same result. The
2011 Jul 06
2
[LLVMdev] code generation removes duplicated instructions
Thank you for replying. Yes. The remaining part of the BB is in splitted basic block. The following is an example code generation for arm and x86 for a same IR BB. In the x86 code I can see that the same computation is done twice and result is stored in two different registers and then these two different registers are used for comparision. By the way I am duplicating instruction and inserting
2011 Jul 06
2
[LLVMdev] code generation removes duplicated instructions
Hello, The code snippet pasted in the previous email are generated at -O0 with llc. Since I am inserting a new basic block (contains printf statement and program exit) which is jumped upon based on the result of the comparison, the compiler cannot/shouldnot optimize that away by means of DCE or anything else. The same kind of stuff is happening for the following duplication. bb6.split:
2011 Jul 07
0
[LLVMdev] code generation removes duplicated instructions
On 7 July 2011 00:02, D S Khudia <daya.khudia at gmail.com> wrote: > I am trying to add a intrinsic call between the similar two instructions > which either I'll remove or convert to nop in codegen. If the two instructions are only similar in your real example, than you need to make them similar in your test, not identical. Different offsets, different array... If them two are
2009 Jul 01
3
[LLVMdev] Generatin code for an ARM-LINUX machine
Hello Misha, I used the snapshots for the latest stable version (70786), and I followed the instructions inside of README file (very clear!!!) However, when I ran the hello program, I get an unrecognized option message. Bellow are the details. ============================================ jcmartin78 at jcmartin78-laptop:~/LLVM/my-test$ llvmc hello.c as: unrecognized option '-meabi=4'
2011 Jul 06
2
[LLVMdev] code generation removes duplicated instructions
Hi Renato, I am trying to add a intrinsic call between the similar two instructions which either I'll remove or convert to nop in codegen. Does that kind of seem appropriate for the purpose here? Thanks Daya On Wed, Jul 6, 2011 at 11:55 AM, Renato Golin <renato.golin at arm.com> wrote: > On 6 July 2011 15:57, D S Khudia <daya.khudia at gmail.com> wrote: > > Since I am
2009 Jul 01
0
[LLVMdev] Generatin code for an ARM-LINUX machine
On Wed, Jul 1, 2009 at 12:01 PM, Juan Carlos Martinez Santos<juanc.martinez.santos at gmail.com> wrote: >  as -meabi=4 -o /tmp/ccYxnIEs.o /tmp/ccy6iYri.s > as: unrecognized option '-meabi=4' [snip] > Any idea what could be wrong? It's probably not finding the right assembler (i.e. using the x86-64 as instead of the arm as). -Eli
2010 Jan 16
2
[LLVMdev] LLVM-gcc for ARM
OK, I put in my classpath the binaries from this package arm-2005q3-1-arm-none-linux-gnueabi-i686-pc-linux-gnu futrhermore in the configure options I specified --with-gnu-ld and  --with-gnu-as but I am getting the same error. exec: 2: -meabi=4: not found Any ideas? --- On Sat, 1/16/10, corina s <corina_fff at yahoo.com> wrote: From: corina s <corina_fff at yahoo.com> Subject:
2011 Jul 07
1
[LLVMdev] code generation removes duplicated instructions
Ok. Let me describe the problem again in some detail. The following is the original bitcode from a real testcase: bb7: %46 = load i32* %j, align 4 %47 = add nsw i32 %46, 1 store i32 %47, i32* %j, align 4 br label %bb8 To protect the operand of the store I duplicate the input chain of operands and insert a comparison to check whether the operand of the stores are correct. As a result of
2018 Aug 15
2
[SCEV] Why is backedge-taken count <nsw> instead of <nuw>?
I'm not sure I understand the poison/undef/UB distinctions. But on this example: define i32 @func(i1 zeroext %b, i32 %x, i32 %y) { > entry: > %adds = add nsw i32 %x, %y > %addu = add nuw i32 %x, %y > %cond = select i1 %b, i32 %adds, i32 %addu > ret i32 %cond > } It is important to not propagate the nsw/nuw between the two SCEV expressions (which unification would
2013 Feb 20
0
[LLVMdev] Is va_arg correct on Mips backend?
Does it make a difference if you give the "-target" option to clang? $ clang -target mips-linux-gnu ch8_3.cpp -o ch8_3.bc -emit-llvm -c The .s file generated this way looks quite different from the one in your email. On Tue, Feb 19, 2013 at 5:06 PM, Jonathan <gamma_chen at yahoo.com.tw> wrote: > I didn't have Mips board. I compile as the commands and check the asm >