similar to: [LLVMdev] bsr not implemented?

Hi I'm a new user of Asterisk and made the first VoIP call on my own LAN with a good quality. Now I want to configure a CMTS (motorola BSR 1000) and a server to support QoS. Does anyone knows how to configure this in order to work with SIP and with Asterisk? any ideas or tutorials? Thanks -------------- next part -------------- An HTML attachment was scrubbed... URL:

On 6 November 2012 14:52, Duncan Sands <baldrick at free.fr> wrote: > Hi Anitha, > > > On 06/11/12 10:19, Anitha Boyapati wrote: > >> Hi Duncan >> I am facing a build error about __builtin_iceil >> > > it's surely just that dragonegg doesn't have any support for this builtin. > ok. Just verified that Target.cpp and x86_builtins do not have

Hi Anitha, > it's surely just that dragonegg doesn't have any support for this builtin. > > ok. Just verified that Target.cpp and x86_builtins do not have iceil support. > I have this tricky situation - I use dragonegg generated LLVM IR as input to > clang for some analysis (well it is clang++ actually). Understably,clang cribs > looking at __builtin_iceil. Any idea

Hi Anitha, On 06/11/12 10:19, Anitha Boyapati wrote: > Hi Duncan > I am facing a build error about __builtin_iceil it's surely just that dragonegg doesn't have any support for this builtin. Please open a bug report with a minimal test case. Ciao, Duncan. when compiled > with dragonegg using -ffast-math option. My dragonegg is built with gcc-4.7.0 > (I am compiling namd

Hi Pawel, can you please pull this dragonegg patch into 3.2. I am the code owner for dragonegg. Thanks a lot, Duncan. On 28/11/12 13:44, Duncan Sands wrote: > Author: baldrick > Date: Wed Nov 28 06:44:50 2012 > New Revision: 168787 > > URL: http://llvm.org/viewvc/llvm-project?rev=168787&view=rev > Log: > Add support for GCC's vector copysign builtins, fixing

Hi Duncan I am facing a build error about __builtin_iceil when compiled with dragonegg using -ffast-math option. My dragonegg is built with gcc-4.7.0 (I am compiling namd spec benchmark here again). Any idea? g++ -march=bdver2 -save-temps -fplugin=/home/anboyapa/install/bin/dragonegg.so -O2 -march=bdver2 -save-temps -fplugin=/home/anboyapa/install/bin/dragonegg.so -mno-fma -mfma4 -ffast-math

1) FLAC supports only MSVS 2005 and newer, so (_MSC_VER >= 1400) is always true and can be removed. 2) The argument for FLAC__clz_uint32() is of FLAC__uint32 type, so FLAC__clz_soft_uint32() should have the same argument type. 3) The patch removes unnecessary parentheses around 'word' variable. 4) It also replaces "sizeof(FLAC__uint32) * CHAR_BIT - 1 -

More or less detailed explanation of this patch. 1. The first parameter of _BitScanReverse() and _BitScanReverse64() is a pointer to unsigned long (4-byte int). However _BitScanReverse64() is called with a pointer to FLAC__uint64 (8-byte int). IMHO it's a bug and this patch changes the type of idx variable inside FLAC__bitmath_ilog2_wide() from FLAC__uint64 to unsigned long. The type of idx

These instructions are prefix selected flavors of bsf and bsr respectively, and hence the presences of the F3 prefix must be handled in the emulation code in order to avoid running into problems on newer CPUs. Signed-off-by: Jan Beulich <jbeulich@suse.com> --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -1058,6 +1058,9 @@ static bool_t vcpu_has(

lvqcl wrote: > More or less detailed explanation of this patch. I've applied part of that patch. > 1. The first parameter of _BitScanReverse() and _BitScanReverse64() is > a pointer to unsigned long (4-byte int). On windows, yes, unsigned long is 4 bytes for both 32 and 64 bit versions. This is not true for most Unices. > However _BitScanReverse64() is called with a pointer to

Dear list, I have a series of data points which I want to approximate with exactly two linear functions. I would like to choose the intervals so that the total deviation from my fitted lines is minimal. How do I best do this? Thanks! Kamila The information transmitted in this electronic communication...{{dropped}}

On Thu, 2008-10-23 at 11:17 -0700, Evan Cheng wrote: > > On Oct 22, 2008, at 11:09 AM, Sanjiv.Gupta at microchip.com wrote: > > > In our case, storeRegToStackSlot, loadRegFromStackSlot clobbers some > > other physical register which may be holding a live value used > > somewhere else. How do I make regalloc aware so that it saves the > > value before

Hi all, Some non trivial legalization of operations which aren't supported by the backend would benefit from having the optimizer pass on them. I noticed some example trying to optimize various pieces of code over the past weeks. One offender is the cttz/ctlz intrinsic when defined on 0. On X86, BSR and NSF are undefined on 0, and only recent CPU have the LZCNT and TZCNT instructions that

I may be wrong here, but legalizing early seems like something that is more likely to prevent optimizations than it is to encourage them. But I guess I don't follow why things like TTI, TII and TLI queries don't suffice for this. CodeGenPrepare will break this sequence up. I would imagine that if the target returns false for isCheapToSpeculateCtlz() and false for canInsertSelect(), the

On Oct 22, 2008, at 11:09 AM, Sanjiv.Gupta at microchip.com wrote: > In our case, storeRegToStackSlot, loadRegFromStackSlot clobbers some > other physical register which may be holding a live value used > somewhere else. How do I make regalloc aware so that it saves the > value before storeRegToStackSlot and make it available again at the > point of earlier use? >

In our case, storeRegToStackSlot, loadRegFromStackSlot clobbers some other physical register which may be holding a live value used somewhere else. How do I make regalloc aware so that it saves the value before storeRegToStackSlot and make it available again at the point of earlier use? TIA, Sanjiv -------------- next part -------------- An HTML attachment was scrubbed... URL:

El 03/05/12 12:19, Miroslav Lichvar escribi?: > Hi Josh, > > nice to see you here again. > > On Wed, Apr 25, 2012 at 04:26:05PM -0700, Josh Coalson wrote: >> (Jumping in again, maybe at the wrong point since this doesn't seem >> to involve encoding, but here goes.) >> >> Miroslav's patches have always been high-quality for sure. But >>

In a follow-up to a previous post a couple weeks back, we've implemented a Samba 3.0.20 (Suse packages on 10.0 - recompiled to include idmap_rid) server to replace the Windows 2000 file server in our Win2003 Active Directory. For the most part things have been going well, but occassionally people will get access denied errors to things that they were accessing just fine minutes before. With

Hi, Is it possible to produce box-and-whisker plots given that I have the median, interquartile and 5/95th centile values, but not the data from which they come? It seems that it ought to be possible to coerce bxp to do what I want, but I can't quite see how. Thanks, Matthew -- Matthew Vernon, Research Fellow Ecology and Epidemiology Group, University of Warwick

Hi All, I've seen several variations on this topic, but nothing exactly the same: I have two Windows 2003 servers that I want to use rsync (2.6.8) to mirror. These machines are separated by a WAN. Initial attempts to get rsync working between them have not been successful. The first rsync went fine, which seeded the files, but the second sync always fails (at a ramdom time) with a